MAX8563 MAXIM [Maxim Integrated Products], MAX8563 Datasheet
MAX8563
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MAX8563 Summary of contents
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... These parts feature a 0.5V reference voltage with ±1% accuracy providing tight regulation of the output volt- age. The MAX8563 has three n-channel MOSFET con- troller outputs, and the MAX8564/MAX8564A has two controller outputs. Each controller output is adjustable from 0.5V to 3.3V when V = 12V and between 0 ...
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... Junction Temperature ......................................................+150°C + 0.3V) Storage Temperature Range .............................-65°C to +150°C DD Lead Temperature (soldering, 10s) .................................+300°C = -40°C to +85°C, unless otherwise noted. Typical values are CONDITIONS Rising, 200mV hysteresis (typ 12V (MAX8563) EN_ 12V (MAX8564/MAX8564A) EN_ DD EN1 = EN2 = EN3 = GND 12V 0° ...
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... +85°C 0.001 A OUTPUT VOLTAGE vs. OUTPUT CURRENT 2.6 2.5 V 2.4 OUT3 2.3 2.2 2.1 2.0 1.9 1.8 1.7 1.6 V OUT1 1.5 1.4 1.3 1.2 V OUT2 1.1 1.0 3.4 0 0.5 1.0 1.5 2.0 OUTPUT CURRENT (A) LOAD TRANSIENT = 1.5V I OUT2 V OUT2 V IN2 V DRV2 V = 12V DD FIGURE 100 F 6TPE100MI 100k 10 s/div UNITS 455 mV 485 mV 0.1 V 0.1 µ 12V DD 2.5 3.0 MAX8563 toc06 2A/div 0 20mV/div AC-COUPLED 200mV/div AC-COUPLED 2V/div 0 3 ...
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... V IN1 0 2V/div V OUT1 0 2V/div V POK1 0 SHORT-CIRCUIT PROTECTION MAX8563 toc09 2V/div 0 2V/div I OUT1 0 V OUT1 2V/div 0 2V/div V DRV1 0 IN MAX8563 toc08 20V/div ENABLE CONFIGURED AS 0 SHOWN IN FIGURE 100k , 2V/div 0 2V/div 0 2V/div 0 10ms/div MAX8563 toc10 5A/div 0 1V/div 0 2V/div 0 20 s/div ...
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... GND Ground Output 2 Power-Good Signal. Open-drain output pulls low when output 2 is 12% below the — POK2 nominal regulated voltage. 6 N.C. — No Internal Connection _______________________________________________________________________________________ Linear n-FET Controllers VL UVLO 0.5V REF MAX8563 MAX8564 MAX8564A 0. POK COMPARATOR CONTROLLER 1 CONTROLLER 2 CONTROLLER 3 FUNCTION for always-on operation. ...
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... Ultra-Low Output Voltage, Dual and Triple Linear n-FET Controllers NAME PIN MAX8564/ MAX8563 MAX8564A Enable Control for Output 2. Drive logic high to enable output 2, or logic low to disable the — EN2 output. Connect utp ve ves the g ate of an exter nal n- channel ate outp ut 3. ...
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... Ultra-Low Output Voltage, Dual and Triple 1. OUT1 C5 1.5V/1. OFF POK1 3. OUT3 C10 2.5V/2A *2.5V OUTPUT ONLY WITH V = 12V DD Figure 1. MAX8563 Typical Application Circuit _______________________________________________________________________________________ Linear n-FET Controllers 5V OR 12V R2 DRV1 V DD FB1 DRV2 ON MAX8563 EN1 FB2 POK1 EN2 GND POK2 N.C. N.C. R7 DRV3 POK3 ...
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... C15 Q4 OUT1 C20 1.5V/1.5A C14 R16 R17 OFF POK1 Figure 2. MAX8564/MAX8564A Typical Application Circuit MAX8563 External Component List COMPONENTS QTY DESCRIPTION 2.2µF, 10V X5R ceramic capacitors (optional 100µF, 18m , 6.3V C1, C3 aluminum electrolytic, Sanyo GTPE100MI in parallel 0.1µF, 16V X7R ceramic capacitor 100µ ...
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... MAX8563/MAX8564/MAX8564A drive DRV_ high but the output does not rise. As DRV_ rails and V 80% of the regulation voltage, the MAX8563/MAX8564/ MAX8564A assume that an output short-circuit fault is present and shut down that regulator. To avoid this error ...
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... The overload protection is shown in Output Voltage the Typical Operating Characteristics The minimum output voltage for each controller of the MAX8563/MAX8564/MAX8564A is typically 0.5V. The maximum output voltage is adjustable up to 3.3V with V = 12V, and up to 1.8V with V DD put voltage, connect the FB_ pin to the center of a volt- age-divider between OUT_ and GND (Figure 5) ...
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... Tantalum and aluminum capacitors are not recommended. Power MOSFET Selection The MAX8563/MAX8564/MAX8564A use an n-channel MOSFET as the series pass transistor instead channel MOSFET to reduce cost. The selected MOS- FET must have a gate threshold voltage that meets the ...
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... Due to the high-current paths and tight output accuracy is the ESR required by most applications, careful PC board layout is required. An evaluation kit (MAX8563EVKIT) is available to speed design important to keep all traces as short as possible to maximize the high-current trace dimensions to reduce the effect of undesirable parasitic inductance. The MOSFET ...
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... Ultra-Low Output Voltage, Dual and Triple TOP VIEW DRV1 1 FB1 2 EN1 3 POK1 4 GND 5 N.C. 6 DRV3 7 FB3 8 ______________________________________________________________________________________ Linear n-FET Controllers DRV2 14 FB2 MAX8563 13 EN2 DRV1 1 12 POK2 FB1 2 N.C. 11 EN1 3 10 POK3 POK1 4 9 EN3 GND 5 QSOP TRANSISTOR COUNT: 1801 PROCESS: BiCMOS Pin Configurations 10 V ...
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Ultra-Low Output Voltage, Dual and Triple Linear n-FET Controllers (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) 14 ______________________________________________________________________________________ Package Information PACKAGE OUTLINE, QSOP ...
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Ultra-Low Output Voltage, Dual and Triple (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages Ø 0.50±0.1 0.6±0.1 1 0.6±0.1 TOP VIEW D2 ...