24AA256-EMC MICROCHIP [Microchip Technology], 24AA256-EMC Datasheet - Page 18
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24AA256-EMC
Manufacturer Part Number
24AA256-EMC
Description
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.24AA256-EMC.pdf
(42 pages)
- Current page: 18 of 42
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24AAXX/24LCXX/24FCXX
7.0
Since the device will not acknowledge commands
during a write cycle, this can be used to determine
when the cycle is complete (This feature can be used
to maximize bus throughput). Once the Stop condition
for a Write command has been issued from the master,
the device initiates the internally timed write cycle. ACK
polling can be initiated immediately. This involves the
master sending a Start condition, followed by the con-
trol byte for a Write command (R/W = 0). If the device
is still busy with the write cycle, then no ACK will be
returned. If no ACK is returned, the Start bit and control
byte must be re-sent. If the cycle is complete, then the
device will return the ACK and the master can then pro-
ceed with the next Read or Write command. See
Figure 7-1 for flow diagram.
DS21930B-page 18
ACKNOWLEDGE POLLING
FIGURE 7-1:
Initiate Write Cycle
Send Control Byte
Write Command
with R/W = 0
Condition to
Acknowledge
Send Stop
Send Start
Did Device
(ACK = 0)?
Operation
Send
Next
ACKNOWLEDGE
POLLING FLOW
© 2007 Microchip Technology Inc.
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