25LC1024T-E/P MICROCHIP [Microchip Technology], 25LC1024T-E/P Datasheet

25LC1024T-E/P

Manufacturer Part Number

25LC1024T-E/P

Description

1 Mbit SPI Bus Serial EEPROM

Manufacturer

MICROCHIP [Microchip Technology]

Datasheet

1.25LC1024T-EP.pdf (30 pages)

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Device Selection Table

Features:

• 20 MHz max. Clock Speed

• Byte and Page-level Write Operations:

• Low-Power CMOS Technology:

• Electronic Signature for Device ID

• Self-Timed Erase and Write Cycles:

• Sector Write Protection (32K byte/sector):

• Built-In Write Protection:

• High Reliability:

• Temperature Ranges Supported:

• Pb-free packages available

Pin Function Table

SCK

HOLD

- 256 byte page

- 6 ms max. write cycle time

- No page or sector erase required

- Max. Write current: 5 mA at 5.5V, 20 MHz

- Read current: 7 mA at 5.5V, 20 MHz

- Standby current: 1μA at 2.5V

- Page Erase (6 ms max.)

- Sector Erase (10 ms max.)

- Chip Erase (10 ms max.)

- Protect none, 1/4, 1/2 or all of array

- Power-on/off data protection circuitry

- Write enable latch

- Write-protect pin

- Endurance: 1M erase/write cycles

- Industrial (I):

- Automotive (E):

Part Number

(Deep power-down)

25LC1024

25AA1024

Name

Chip Select Input

Write-Protect

Ground

Serial Clock Input

Hold Input

Supply Voltage

Serial Data Output

Serial Data Input

-40°C to +85°C

-40°C to +125°C

1 Mbit SPI Bus Serial EEPROM

2.5-5.5V

1.8-5.5V

Range

Function

25AA1024/25LC1024

Page Size

256 Byte

Preliminary

Description:

The Microchip Technology Inc. 25AA1024/25LC1024

(25XX1024

with byte-level and page-level serial EEPROM func-

tions. It also features Page, Sector and Chip erase

functions typically associated with Flash-based prod-

ucts. These functions are not required for byte or page

write operations. The memory is accessed via a simple

Serial Peripheral Interface (SPI) compatible serial bus.

The bus signals required are a clock input (SCK) plus

separate data in (SI) and data out (SO) lines. Access to

the device is controlled by a Chip Select (CS) input.

Communication to the device can be paused via the

hold pin (HOLD). While the device is paused, transi-

tions on its inputs will be ignored, with the exception of

Chip Select, allowing the host to service higher priority

interrupts.

The 25XX1024 is available in standard packages

including 8-lead PDIP and SOIJ, and advanced 8-lead

DFN package. All devices are Pb-free.

Package Types (not to scale)

*25XX1024 is used in this document as a generic part number

for the 25AA1024, 25LC1024 devices.

Temp. Ranges

I,E

) is a 1024 Kbit serial EEPROM memory

DFN

(MF)

HOLD

SCK

Packages

P, SM, MF

PDIP/SOIJ

(P, SM)

DS21836D-page 1

HOLD

SCK

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