W25Q80BVDAAG WINBOND [Winbond], W25Q80BVDAAG Datasheet - Page 59

• Manufacturer Part Number: W25Q80BVDAAG
• Description: 8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI
• Manufacturer: WINBOND [Winbond]

9.2.38
The Program Security Register instruction is similar to the Page Program instruction. It allows from one
byte to 256 bytes of security register data to be programmed at previously erased (FFh) memory
locations. A Write Enable instruction must be executed before the device will accept the Program Security
Register Instruction (Status Register bit WEL= 1). The instruction is initiated by driving the /CS pin low
then shifting the instruction code “42h” followed by a 24-bit address (A23-A0) and at least one data byte,
into the DI pin. The /CS pin must be held low for the entire length of the instruction while data is being
sent to the device.
The Program Security Register instruction sequence is shown in figure 36. The Security Register Lock
Bits LB[3:1] in the Status Register-2 can be used to OTP protect the security registers. Once a lock bit is
set to 1, the corresponding security register will be permanently locked, Program Security Register
instruction to that register will be ignored (See 9.1.9, 9.2.21 for detail descriptions).
(IO
(IO
CLK
CLK
/CS
/CS
DI
DI
0
0
)
)
Mode 3
Mode 0
0
39
Program Security Registers (42h)
*
*
= MSB
7
Security Register #1
Security Register #2
Security Register #3
40
6
41
ADDRESS
0
5
42
Data Byte 2
1
4
43
Instruction (42h)
2
3
44
3
2
Figure 36. Program Security Registers Instruction Sequence
45
4
1
46
5
0
47
6
*
7
48
A23-16
7
00h
00h
00h
6
23
49
*
8
5
22
50
Data Byte 3
9
4
21
51
- 59 -
10
24-Bit Address
3
52
2
A15-12
53
0 0 0 1
0 0 1 0
0 0 1 1
3
28
1
54
2
29
0
55
1
30
Publication Release Date: October 06, 2010
0
31
*
7
*
7
32
0 0 0 0
0 0 0 0
0 0 0 0
A11-8
6
6
33
5
Data Byte 256
5
34
Data Byte 1
4
4
35
3
W25Q80BV
3
36
Byte Address
Byte Address
Byte Address
2
2
37
A7-0
1
1
38
0
0
Revision D
39
Mode 3
Mode 0