M48Z35AV-70MH1 STMICROELECTRONICS [STMicroelectronics], M48Z35AV-70MH1 Datasheet - Page 8

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M48Z35AV-70MH1

Manufacturer Part Number
M48Z35AV-70MH1
Description
256 Kbit 32Kb x8 ZEROPOWER SRAM
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
M48Z35AY, M48Z35AV
Table 10. Write Mode AC Characteristics
(T
Note: 1. C
DATA RETENTION MODE
With valid V
erates as a conventional BYTEWIDE™ static
RAM. Should the supply voltage decay, the RAM
will automatically power-fail deselect, write pro-
tecting itself when V
V
pedance, and all inputs are treated as "don't care."
Note: A power failure during a write cycle may
corrupt data at the currently addressed location,
but does not jeopardize the rest of the RAM's con-
tent. At voltages below V
assured the memory will be in a write protected
state, provided the V
The M48Z35AY/35AV may respond to transient
noise spikes on V
8/16
PFD
A
t
t
WHQX
WLQZ
= 0 to 70 °C or –40 to 85 °C; V
Symbol
t
t
t
t
t
2. If E goes low simultaneously with W going low, the outputs remain in the high impedance state.
t
t
t
t
t
t
(min) window. All outputs become high im-
t
t
WLWH
WHAX
DVWH
WHDX
AVWH
EHDX
AVWL
EHAX
DVEH
AVEH
ELEH
AVAV
AVEL
(1, 2)
L
(1, 2)
= 5pF (see Figure 4).
CC
applied, the M48Z35AY/35AV op-
Write Cycle Time
Address Valid to Write Enable Low
Address Valid to Chip Enable Low
Write Enable Pulse Width
Chip Enable Low to Chip Enable High
Write Enable High to Address Transition
Chip Enable High to Address Transition
Input Valid to Write Enable High
Input Valid to Chip Enable High
Write Enable High to Input Transition
Chip Enable High to Input Transition
Write Enable Low to Output Hi-Z
Address Valid to Write Enable High
Address Valid to Chip Enable High
Write Enable High to Output Transition
CC
CC
CC
that reach into the deselect
falls within the V
fall time is not less than t
PFD
(min), the user can be
Parameter
CC
= 4.5V to 5.5V or 3.0V to 3.6V)
PFD
(max),
F
.
window during the time the device is sampling
V
lines is recommended.
When V
switches power to the internal battery which pre-
serves data. The internal button cell will maintain
data in the M48Z35AY/35AV for an accumulated
period of at least 10 years (at 25°C) when V
less than V
As system power returns and V
V
supply is switched to external V
tion continues until V
t
t
REC
REC
CC
SO
. Therefore, decoupling of the power supply
, the battery is disconnected, and the power
Min
(min). Normal RAM operation can resume
70
50
55
30
30
60
60
after V
0
0
0
0
5
5
5
M48Z35AY
CC
-70
SO
CC
drops below V
.
Max
exceeds V
25
CC
Min
100
80
80
10
10
50
50
80
80
10
reaches V
PFD
0
0
5
5
M48Z35AV
SO
(max).
-100
, the control circuit
CC
CC
Max
50
. Write protec-
PFD
rises above
(min) plus
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CC
is

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