STK11C88-3N25 SIMTEK [Simtek Corporation], STK11C88-3N25 Datasheet - Page 3
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STK11C88-3N25
Manufacturer Part Number
STK11C88-3N25
Description
Manufacturer
SIMTEK [Simtek Corporation]
Datasheet
1.STK11C88-3N25.pdf
(10 pages)
SRAM READ CYCLES #1 & #2
Note f:
Note g: I/O state assumes E and G < V
Note h: Measured ± 200mV from steady state output voltage.
SRAM READ CYCLE #1: Address Controlled
SRAM READ CYCLE #2: E Controlled
March 2006
DQ (DATA OUT)
NO.
10
11
1
2
3
4
5
6
7
8
9
ADDRESS
DQ (DATA
ADDRESS
W must be high during SRAM READ cycles and low during SRAM WRITE cycles.
t
t
t
t
t
t
t
t
t
t
t
ELQV
AVAV
AVQV
GLQV
AXQX
ELQX
EHQZ
GLQX
GHQZ
ELICCH
EHICCL
#1, #2
I
CC
G
E
f
g
g
h
h
SYMBOLS
e
d, e
t
t
t
t
t
t
t
t
t
t
t
ACS
RC
AA
OE
OH
LZ
HZ
OLZ
OHZ
PA
PS
Alt.
STANDBY
Chip Enable Access Time
Read Cycle Time
Address Access Time
Output Enable to Data Valid
Output Hold after Address Change
Chip Enable to Output Active
Chip Disable to Output Inactive
Output Enable to Output Active
Output Disable to Output Inactive
Chip Enable to Power Active
Chip Disable to Power Standby
IL
and W > V
t
ELICCH
t
ELQX
t
AXQX
10
t
6
GLQX
5
8
IH
; device is continuously selected.
PARAMETER
t
GLQV
4
t
AVAV
f
t
ELQV
2
ACTIVE
t
AVQV
1
3
t
AVAV
2
3
f, g
Document Control # ML0013 rev 0.2
STK11C88-3-35
MIN
DATA VALID
35
5
5
0
0
MAX
35
35
15
13
13
35
DATA VALID
STK11C88-3-45
MIN
45
5
5
0
0
t
GHQZ
MAX
9
t
45
45
20
15
15
45
(V
EHQZ
7
t
EHICCL
CC
11
STK11C88-3
STK11C88-3-55
MIN
55
5
5
0
0
= 3.0V-3.6V)
MAX
55
55
25
20
20
55
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns