STK14EC16-BF15 SIMTEK [Simtek Corporation], STK14EC16-BF15 Datasheet - Page 6

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STK14EC16-BF15

Manufacturer Part Number
STK14EC16-BF15
Description
256Kx16 AutoStore nvSRAM
Manufacturer
SIMTEK [Simtek Corporation]
Datasheet
Document Control #ML0061 Rev 1.1
STK14EC16
SRAM READ CYCLES #1 & #2
Note c: W must be high during SRAM READ cycles.
Note d: Device is continuously selected with E and G both low, LB and UB select bytes read.
Note e: Measured ± 200mV from steady state output voltage.
Note f:
SRAM READ CYCLE #1: Address Controlled
SRAM READ CYCLE #2: E and G Controlled
NO.
10
12
13
14
11
1
2
3
4
5
6
7
8
9
DQ (D ATA OUT)
27
Jan, 2008
ADDR ESS
HSB must remain high during READ and WRITE cycles.
t
t
t
AVAV
AVQV
AXQX
#1
I
c
d
CC
d
G
E
Data Output
SYMBOLS
Address
t
t
t
t
t
t
t
t
t
t
t
t
t
t
ELQV
ELEH
AVQV
GLQV
BLQV
AXQX
ELQX
EHQZ
BLQX
GLQX
GHQZ
BHQZ
ELICCH
EHICCL
#2
c
d
d
e
e
e
b
b
Alt.
t
t
t
t
t
t
t
t
t
t
t
ACS
RC
AA
OE
OH
LZ
HZ
OLZ
OHZ
PA
PS
ST AND BY
Previous Data Valid
t
ELI CC H
t
ELQ X
1 0
t
Chip Enable Access Time
Read Cycle Time
Address Access Time
Output Enable to Data Valid
Byte Enable to Data Valid
Output Hold after Address Change
Address Change or Chip Enable to
Output Active
Address Change or Chip Disable to
Output Inactive
Byte Enable to Output Active
Output Enable to Output Active
Output Disable to Output Inactive
Byte Enable to Output Inactive
Chip Enable to Power Active
Chip Disable to Power Standby
6
t
AV QV
G L Q X
3
8
Simtek Confidential
t
G L QV
t
PARAMETER
4
AXQX
t
t
EL Q V
(6)
E LE H
1
2
t
AC T IVE
AVQV
6
Address Valid
c,d,f
c,f
(3)
t
AVAV
(2)
STK14EC16-15
MIN
15
3
3
0
0
MAX
15
15
10
10
15
7
7
7
7
t
EHAX
Output Data Valid
29
STK14EC16-25
MIN
DAT A VAL ID
25
3
3
0
0
Preliminary
MAX
t
25
25
12
12
10
10
10
10
25
GH Q Z
9
t
EHQ Z
7
STK14EC16-45
t
MIN
EHI CC L
45
3
3
0
0
11
MAX
45
45
20
20
15
15
15
15
45
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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