NM95HS01 NSC [National Semiconductor], NM95HS01 Datasheet - Page 13

• Manufacturer Part Number: NM95HS01
• Description: HiSeC-TM High Security Rolling Code Generator
• Manufacturer: NSC [National Semiconductor]

AutoResync
LEDSEL
BatteryType
TIMEOUTEN
Pause Length
(Pause0 Pause1)
FactoryDisableBit
WriteDisableBit
PreamblePresent
SyncType
SyncPresent
FixSize
FixPresent
DynSize
ParityPresent
CompareEnable
BitTransmitFormat
TxPol
SCLK
Prescaler3
Prescaler2
Prescaler1
DynamicCode
KeyIDCode
SyncFieldCode
Reserved
Generator Clock Design Parameters
Note The first bit clocked into the device is Byte 0 bit 7 The seventh and eight bits are the chip disable bits Once they are set and V
be disabled
IRSel
PRSeI2 1 0
Parameter
Bits
24
24
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
3
1
1
6
6
6
8
8
TABLE VII NM95HS01 02 EEPROM Array Configuration and Definitions
Byte 0 bit 7
Byte 0 bit 6
Byte 0 bit 5
Byte 0 bit 4
Byte 0 bits 3–2
Byte 0 bit 1
Byte 0 bit 0
Byte 1 bit 7
Byte 1 bit 6
Byte 1 bit 5
Byte 1 bit 4
Byte 1 bit 3
Byte 1 bit 2
Byte 1 bit 1
Byte 1 bit 0
Byte 2 bit 7
Byte 2 bits 6–4
Byte 2 bit 3
Byte 2 bit 2
Byte 2 bits 1–0
Byte 3 bits 7–4
Byte 3 bits 3–0
Byte 4 bits 7–6
Byte 4 bits 5–0
Bytes 5–7
Bytes 8–10
Byte 11
Byte 12
Address
Allows user to send a sync frame by holding a key down for
Determines whether RFEN LED or CKO LED is the LED connect pin for the
NM95HS02
Selects between 3V and 6V battery voltage
Disables data transmission if key is depressed
Sets the pause time between data frames during data transmission
(0 20 50 100) ms
Disables ability to write to Byte 12
Enables disables ability to write into EEPROM array
Enables disables presence of preamble field
Determines if sync field is sent in user-selected IR RF format or default NRZ
format
Enables disables presence of sync field
Determines length of Key ID field (0 20 24 bits)
Enables disables presence of Key ID field
Determines length of Dynamic Code field (24 36 bits)
Enables disables presence of parity field
Enables disables low battery detect option
Selects among the 12 possible IR RF bit coding formats
Selects between IR and RF bit coding formats
Used with IRSeI to select particular bit coding format
Sets the quiescent output state and data logic level on the TX output pin
Determines whether the IR clock or RF clock is used as the bit timing time
base
Sets interframe delay time and key debounce time (Also generates timeout
delay time)
Sets RF Clock timing
Sets IR Clock timing
Sets initial configuration of the Rolling Code registers
Sets user-configurable key identification register
Sets configuration of sync field register
Reserved for factory use
(Continued)
13
unique customized algorithm option
Function
l
80 seconds
CC
is removed the chip will
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10 seconds
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