LNK562P POWERINT [Power Integrations, Inc.], LNK562P Datasheet - Page 7

• Manufacturer Part Number: LNK562P
• Description: Energy Effi cient Off-Line Switcher IC for Linear Transformer Replacement
• Manufacturer: POWERINT [Power Integrations, Inc.]

Y Capacitor
The placement of the Y capacitor should be directly from the
primary input fi lter capacitor positive terminal to the common/
return terminal of the transformer secondary. Such a placement
will route high magnitude common-mode surge currents away
from the LinkSwitch-LP device. Note: If an input pi (C, L, C)
EMI fi lter is used, then the inductor in the fi lter should be placed
between the negative terminals on the input fi lter capacitors.
Output Diode
For best performance, the area of the loop connecting the
secondary winding, the output diode and the output fi lter
capacitor should be minimized. In addition, suffi cient copper
area should be provided at the anode and cathode terminals
of the diode for heat sinking. A larger area is preferred at the
quiet cathode terminal. A large anode area can increase high-
frequency radiated EMI.
Quick Design Checklist
As with any power supply design, all LinkSwitch-LP designs
should be verifi ed on the bench to make sure that component
specifi cations are not exceeded under worst-case conditions. The
following minimum set of tests is strongly recommended:
1. Maximum drain voltage – Verify that V
650 V at the highest input voltage and peak (overload) output
power. A 50 V margin to the 700 V BV
gives margin for design variation, especially in Clampless
designs.
DS
DSS
does not exceed
specifi cation
2. Maximum drain current – At maximum ambient
3. Thermal Check – At specified maximum output
Design Tools
Up-to-date information on design tools can be found at the
Power Integrations web site: www.powerint.com.
temperature, maximum input voltage and peak output
(overload) power, verify drain current waveforms for any
signs of transformer saturation and excessive leading-edge
current spikes at startup. Repeat under steady state conditions
and verify that the leading-edge current spike event is below
I
maximum DRAIN current should be below the specifi ed
absolute maximum ratings.
power, minimum input voltage and maximum ambient
temperature, verify that the temperature specifi cations
are not exceeded for LinkSwitch-LP, transformer, output
diode and output capacitors. Enough thermal margin
should be allowed for part-to-part variation of the R
LinkSwitch-LP as specifi ed in the data sheet. Under low line and
maximum power, a maximum LinkSwitch-LP SOURCE pin
temperature of 100 °C is recommended to allow for these
variations.
LIMIT(MIN)
at the end of the t
LEB(MIN)
. Under all conditions, the
LNK562-564
10/05
F
DS(ON)
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of