STP2230SOP-100 ETC2 [List of Unclassifed Manufacturers], STP2230SOP-100 Datasheet

Manufacturer Part Number

STP2230SOP-100

Description

Crossbar Switch

Manufacturer

ETC2 [List of Unclassifed Manufacturers]

Datasheet

1.STP2230SOP-100.pdf (16 pages)

DATA SHEET

The STP2230SOP crossbar switch

the buses is dedicated to interfacing to system memory, while the other two are general-purpose

buses. These buses are used for interfacing memory, a processor bus, and an I/O bus. In this partic-

ular conﬁguration, eighteen XB1s are required per system implementation.

• Three-port crossbar

• Decoupled memory port; loading and unloading of memory data can take place in parallel with other operations

• Burst transfers operate on four bytes of data per slice

• Power-up safe buses; all buses power up tristated so there will be no bus contention with other parts which may

• Implemented in 0.8-micron BiCMOS and housed in a 48-pin TSSOP package (also called DGG or “shrink-wide

EATURES

ESCRIPTION

- 16-bit data

- 8-bit processor

- 4-bit data ports

be on the buses

bus”)

1. The STP2230SOP crossbar switch is also referred to as BMX.

[1]

acts as the bridge among three UltraSPARC UPA devices. One of

STP2230SOP

Crossbar Switch

XB1

July 1997