MCP9808 MICROCHIP [Microchip Technology], MCP9808 Datasheet - Page 13

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MCP9808

Manufacturer Part Number
MCP9808
Description
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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4.0
4.1
The MCP9808 Serial Clock (SCL) input and the
bidirectional Serial Data (SDA) line form a 2-wire
bidirectional,
communication port (refer to the
Pin Characteristics
Timing Specifications
The following bus protocol has been defined:
TABLE 4-1:
© 2011 Microchip Technology Inc.
Master
Slave
Transmitter Device sending data to the bus.
Receiver
START
STOP
Read/Write A read or write to the MCP9808
ACK
NAK
Busy
Not Busy
Data Valid
Term
SERIAL COMMUNICATION
2-Wire Standard Mode I
Protocol Compatible Interface
The device that controls the serial bus,
typically a microcontroller.
The device addressed by the master,
such as the MCP9808.
Device receiving data from the bus.
A unique signal from the master to
initiate serial interface with a slave.
A unique signal from the master to
terminate serial interface from a slave.
registers.
A receiver Acknowledges (ACK) the
reception of each byte by polling the bus.
A receiver Not-Acknowledges (NAK) or
releases the bus to show End-of-Data
(EOD).
Communication is not possible
because the bus is in use.
The bus is in the Idle state; both SDA
and SCL remain high.
SDA must remain stable before SCL
becomes high in order for a data bit to
be considered valid. During normal
data transfers, SDA only changes state
while SCL is low.
Standard
MCP9808 SERIAL BUS
PROTOCOL DESCRIPTIONS
and
tables).
Description
mode,
Sensor Serial Interface
Digital Input/Output
I
2
C
2
C™
compatible
4.1.1
Data transfers are initiated by a Start condition
(START), followed by a 7-bit device address and a
read/write bit. An Acknowledge (ACK) from the slave
confirms the reception of each byte. Each access must
be terminated by a Stop condition (STOP).
Repeated communication is initiated after t
This device does not support sequential register
read/write. Each register needs to be addressed using
the Register Pointer.
This device supports the receive protocol. The register
can be specified using the pointer for the initial read.
Each repeated read or receive begins with a Start
condition and address byte. The MCP9808 retains the
previously selected register. Therefore, it outputs data
from the previously specified register (repeated pointer
specification is not necessary).
4.1.2
The bus is controlled by a master device (typically a
microcontroller) that controls the bus access and
generates the Start and Stop conditions. The MCP9808
is a slave device and does not control other devices in
the bus. Both master and slave devices can operate as
either transmitter or receiver. However, the master
device determines which mode is activated.
4.1.3
A high-to-low transition of the SDA line (while SCL is
high) is the Start condition. All data transfers must be
preceded by a Start condition from the master. A
low-to-high transition of the SDA line (while SCL is
high) signifies a Stop condition.
If a Start or Stop condition is introduced during data
transmission, the MCP9808 releases the bus. All data
transfers are ended by a Stop condition from the
master.
DATA TRANSFER
MASTER/SLAVE
START/STOP CONDITION
MCP9808
DS25095A-page 13
B-FREE
.

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