LM89CIM NSC [National Semiconductor], LM89CIM Datasheet - Page 11

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LM89CIM

Manufacturer Part Number
LM89CIM
Description
Manufacturer
NSC [National Semiconductor]
Datasheet

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1.0 Functional Description
1.10 SERIAL INTERFACE RESET
In the event that the SMBus Master is RESET while the
LM89 is transmitting on the SMBData line, the LM89 must be
returned to a known state in the communication protocol.
This may be done in one of two ways:
1. When SMBData is LOW, the LM89 SMBus state ma-
chine resets to the SMBus idle state if either SMBData
or SMBCLK are held low for more than 35ms (t
Note that according to SMBus specification 2.0 all de-
vices are to timeout when either the SMBCLK or SMB-
Data lines are held low for 25-35ms. Therefore, to insure
(c) Serial Bus Read from a Register with the Internal Command Register preset to desired value.
(a) Serial Bus Write to the internal Command Register followed by a the Data Byte
(b) Serial Bus Write to the Internal Command Register
FIGURE 7. SMBus Timing Diagrams
(Continued)
TIMEOUT
LM89 Timing Diagram
).
11
1.9.1 SMBus Timing Diagrams
2. When SMBData is HIGH, have the master initiate an
1.11 DIGITAL FILTER
In order to suppress erroneous remote temperature readings
due to noise, the LM89 incorporates a user-configured digital
filter. The filter is accessed in the FILTER and ALERT CON-
a timeout of all devices on the bus the SMBCLK or
SMBData lines must be held low for at least 35ms.
SMBus start. The LM89 will respond properly to an
SMBus start condition at any point during the communi-
cation. After the start the LM89 will expect an SMBus
Address address byte.
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