LM80CIMT-5 NSC [National Semiconductor], LM80CIMT-5 Datasheet - Page 11
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LM80CIMT-5
Manufacturer Part Number
LM80CIMT-5
Description
Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor
Manufacturer
NSC [National Semiconductor]
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Functional Description
2.2 Serial Bus Interface
The Serial Bus control lines consists of the SDA (serial data),
SCL (serial clock) and A0-A1 (address) pins. The LM80 can
only operate as a slave. The SCL line only controls the serial
interface, all other clock functions within LM80 such as the
ADC and fan counters are done with a separate asynchro-
nous internal clock.
When using the Serial Bus Interface a write will always
consist of the LM80 Serial Bus Interface Address byte, fol-
lowed by the Internal Address Register byte, then the data
byte. There are two cases for a read:
1. If the Internal Address Register is known to be at the
desired Address, simply read the LM80 with the Serial
Bus Interface Address byte, followed by the data byte
read from the LM80.
(c) Serial Bus Read from a Register with the Internal Address Register Preset to Desired Location
(a) Serial Bus Write to the Internal Address Register followed by the Data Byte
(b) Serial Bus Write to the Internal Address Register Only
(Continued)
FIGURE 5. Serial Bus Timing
11
2. If the Internal Address Register value is unknown, write
The default power on Serial Bus address for the LM80 is:
0101(A2)(A1)(A0) binary, where A0-A2 reflect the state of
the pins defined by the same names.
All of these communications are depicted in the Serial Bus
Interface Timing Diagrams as shown in Figure 5 .
to the LM80 with the Serial Bus Interface Address byte,
followed by the Internal Address Register byte. Then
restart the Serial Communication with a Read consisting
of the Serial Bus Interface Address byte, followed by the
data byte read from the LM80.
DS100040-8
DS100040-10
DS100040-9
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