SC120EVB SEMTECH [Semtech Corporation], SC120EVB Datasheet - Page 25

• Manufacturer Part Number: SC120EVB
• Description: Low Voltage Synchronous Boost Regulator
• Manufacturer: SEMTECH [Semtech Corporation]

Applications Information (continued)
This is the change in I
off -state, again neglecting the p-channel FET R
the inductor DCR,
Note that this is a negative quantity, since V
0 < D < 1. For a constant load in steady-state, the inductor
current must satisfy ΔI
expressions and solving for D, obtain D = 1 – V
Using this expression, and the positive valued expression
ΔI
expression for I
If the value of I
boundary of continuous and discontinuous PWM opera-
tion, the SC120 will transition from PWM operation to
PSAVE operation. Define this value of I
Setting the expression for I
The programmed value of V
polynomial function of V
and solving for V
mum of this function, a maximum, at V
Applying this value of V
The value of the inductor determines the PSAVE entry
output load current for a given V
* For simplicity, effi ciency (η) is represented as a constant. But effi cien-
cy, itself a function of V
with increasing temperature). Therefore at a given temperature, the
input voltage that produces the maximum PSAVE entry load current
will be slightly greater than
L
= ΔI
I
I
I
L
PSAVE
PSAVE
I
I
max,min
L
L
on
off
L-on
entry
entry
for current ripple amplitude, obtain expanded
1
L
L
1
max
V
0
DT
OUT
2
DT
V
T
L-max
OUT
IN
IN
V
V
L
T
IN
reveals that there is one non-zero extre-
IN
IN
I
decreases until I
L
dt
and I
OUT
, decreases with decreasing V
V
T
V
V
L-on
OUT
IN
L
2
OUT
/
IN
V
during the on-state. During the
3
L-min
27
2
,
2
of V
IN
+ ΔI
IN
T
2
dt
L-min
. Equating dI
.
L
L
V
OUT
D
V
OUT
L-off
OUT
OUT
.
to 0 and solving,
V
T
V
IN
V
= 0. Substituting the two
is constant. I
OUT
IN
. Evaluate I
IN
V
IN
L-min
V
L
V
OUT
OUT
= 0, which is the
PSAVE-entry
OUT
T
IN
IN
V
PSAVE-entry
OUT
IN
(and decreases
as I
1
PSAVE-entry
=
> V
/dV
2
DS-ON
D
PSAVE-entry
/
3
IN
IN
V
at the
/V
IN
OUT
and
and
is a
= 0
OUT
.*
.
.
smallest and largest expected values of V
range includes V
Note that at high V
require an unusually high output load current. In this
case, PSAVE re-entry may be of little concern. So if the
largest V
evaluate PSAVE entry at V
To ensure that I
current, evaluate the PSAVE-PWM mode transistions while
applying increasing and decreasing loads with V
above
lowest specifi ed ambient temperature as well as at room
temperature. If the PSAVE exit current is not suffi ciently
greater than the PSAVE entry current, the separation can
be enhanced by increasing the output capacitance to raise
I
by increasing the inductor value to reduce I
The inductor selection should also consider the n-channel
FET current limit for the expected range of input voltage
and output load current. The largest I
expected smallest V
largest allowable ΔI
the minimum n-channel FET current limit, and the
inductor tolerance. Ensure that in the worst case,
I
These calculations include the parameter η, efficiency.
Effi ciency varies with V
using the plots provided in this datasheet, or from experi-
mental data, at the operating condition of interest when
computing the eff ect of a new inductor value on PSAVE
entry and I-limit margin.
Any chosen inductor should have low DCR, compared to
the R
though for DCR << R
provide diminishing benefi t. The inductor I
exceed the expected I
quency should exceed 5×f
properties should provide satisfactory performance.
L = 4.7μH should perform well for most applications. For
high V
above), L = 6.8μH, along with a larger output capacitance
or larger-package output capacitor (for better V-bias per-
PSAVE-exit
L-avg
+ ΔI
DS-ON
OUT
2
due to the 5μs off -time criterion (see Figure 3), or
/
L
3
/2 < I
, (4.0V to 5.0V), and relatively high V
IN
V
of the FET switches, to maintain efficiency,
exceeds approximately 90% of V
OUT
LIM(N)
. This should be done at the application’s
PSAVE-entry-max
IN
.
=
L
IN
, based on the largest expected I
2
IN
L-max
DS-ON
/
(V
IN
3
and largest I
, I
V
IN
OUT
IN
. The inductor self-resonant fre-
OUT
, further reduction in DCR will
will be less than the PSAVE exit
close to V
= 0.9V
, and temperature. Estimate η
osc
, also determine I
. Any inductor with these
OUT
.
OUT
OUT
L-avg
) PSAVE exit may
. Determine the
will occur at the
SAT
IN
PSAVE-entry
. If the input
value should
OUT
IN
SC120
PSAVE-entry-max
(3.3V and
, instead
IN
.
at and
L-avg
25
.
,