S-8550 SII [Seiko Instruments Inc], S-8550 Datasheet - Page 10

• Manufacturer Part Number: S-8550
• Description: STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECIFICATION, PWM CONTROL SWITCHING REGULATORS
• Manufacturer: SII [Seiko Instruments Inc]

10
STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS
S-8550/8551 Series
Operation Principle
1. Continuous mode
The S-8550/8551 Series is a step-down synchronous rectification switching regulator based on constant PWM
control. Figure 7 shows the basic circuit diagram.
A step-down switching regulator starts current supply by the input voltage (V
turned on and holds energy in the inductor at the same time. When the Pch power MOS FET is turned off, the
current held in the inductor is released. The released current flows in the smoothing circuit, with the energy loss
held minimum, supplies the output voltage (V
switching frequency (f
the ON time with f
The following explains how the current flows to the inductor when the step-down operation is constant and
stable.
When the Pch power MOS FET is turned on, current I
and energy is stored in the inductor (L). When the output capacitor (C
current (I
time (t
power MOS FET is turned off, the Nch power MOS FET is turned on and I
current I
reaches I
turned off and the next cycle is entered. The above sequence is repeated.
As explained in the above, the continuous mode refers to the operation in the current cycle in which I
changes from I
ON
) of the Pch power MOS FET as shown in Figure 8 (changes from I
2
OUT
L
flows in the direction shown by the arrow in Figure 7. As a result, I
min. when the OFF time (t
) is started at the same time. The inductor current (I
OSC
L
min. to I
unchanged.
osc
Figure 8 Continuous Mode (Current Cycle of Inductor Current (I
Figure 7 Basic Circuit Drawing of Step-down Switching Regulator
) and ON time (t
L
V
max. Even if I
IN
I
I
L
L
max.
min.
Pch power MOS FET
Control
I
1
circuit
I
L
on
OFF
Seiko Instruments Inc.
). With the PWM control method, V
L
) has elapsed. When t
min. is less than 0 A, I
OUT
t
on
) lower than V
T = 1/f
Nch power MOS FET
I
2
1
OSC
flows in the direction shown by the arrow in Figure 7,
L
t
off
L
IN
OFF
L
min. keeps flowing (backflow current flows).
.
) gradually increases in proportion to the ON
V
has elapsed, the Nch power MOS FET is
OUT
C
OUT
L
IN
OUT
is kept constant by controlling the
tries to hold I
) when the Pch power MOS FET is
OUT
) is charged, supply of the output
L
min. to I
is made constant by controlling
V
t
OUT
L
gradually decreases and
L
L
max.). When the Pch
L
))
max. Consequently,
Rev.2.1
L
linearly
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