SLB128B NSC [National Semiconductor], SLB128B Datasheet - Page 41

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SLB128B

Manufacturer Part Number
SLB128B
Description
Transmitter with built-in scaler for LVDS Display Interface (LDI)
Manufacturer
NSC [National Semiconductor]
Datasheet
Applications Information
How to configure the DS90C2501 with DS90C364 or
DS90CF364A or DS90CF366 for most common applica-
tion:
1. To configure for single pixel in to single pixel out applica-
tion
DS90CF364A or DS90CF366, the “DUAL” pin must be set to
Gnd (single). In this mode, outputs A0-to-A3 and CLK1 are
enabled, and outputs A4-to-A7 and CLK2 are disabled which
reduces power dissipation.
using
the
DS90C2501
From DS90C2501
D12 to D23
REFCLK
CLKINM
CLKINP
HSYNC
COLOR
VSYNC
S2Cdat
S2Cclk
EDGE
DUAL
RES1
RES2
RES3
RES4
TST1
TST2
TST3
with
D10
BAL
D11
ID0
ID1
ID2
ID3
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
DE
A0
A1
A2
TABLE 10. Connection for SISO Operation
DS90CF364
RGB data signal connection
connection for other pins
Pull Up/Pull Down, Based on Device Address
Pull Up/Pull Down, Based on Device Address
Pull Up/Pull Down, Based on Device Address
or
Pull Up/Pull Down, Based on Panel ID
Pull Up/Pull Down, Based on Panel ID
Pull Up/Pull Down, Based on Panel ID
Pull Up/Pull Down, Based on Panel ID
41
Features Description:
2. Programmable Primary Edge E1: The transmitter is
latching data on both the rising and falling edges of clock
signal coming in on CLKINP pin. The EDGE pin can be used
to program to select the rising edge of CLKINP as the
primary edge E1 or to have the falling edge of CLKINP as the
primary edge E1. However, the logic state of the EDGE pin
must agree with the GUI to generate the correct display.
3V 14.31818MHz
DVOxCLKOUT1
DVOxCLKOUT0
DVOxDATA10
DVOxDATA11
DVOxHSYNC
DVOxVYSNC
DVOxBLANK
DVOxDATA0
DVOxDATA1
DVOxDATA2
DVOxDATA3
DVOxDATA4
DVOxDATA5
DVOxDATA6
DVOxDATA7
DVOxDATA8
DVOxDATA9
To GMCH
I2CDATA
I2CCLK
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
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