MC9S08LC36 FREESCALE [Freescale Semiconductor, Inc], MC9S08LC36 Datasheet - Page 151
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MC9S08LC36
Manufacturer Part Number
MC9S08LC36
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S08LC36.pdf
(358 pages)
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Figure 9-17
VIn = VOut, and, because the input impedance of the op amp is very high, VIn is isolated from VOut This
isolation can protect VIn from things like current draw from VOut; however, if the buffer is disabled
((~BBYPASS & powersw3) = 0), the output and input will be configured in a tri-state condition; that is,
floating.
Freescale Semiconductor
VSUPPLY[1:0] powersw1 powersw2 powersw3
also illustrates a buffer, a voltage follower with an ideal op amp. The buffer, if enabled, gives
00
01
10
11
The charge pump is optimized for 1/3 bias mode operation only.
During the first 16 timebase clock cycles after the LCDCPEN bit is set, all
the LCD frontplane and backplane outputs are disabled regardless of state
of the LCDEN bit.
The charge pump requires external capacitance for is operation. To provide
this external capacitance, the V
is recommended that a low equivalent series resistance (ESR) capacitor be
used. Proper orientation is imperative when using a polarized capacitor. The
recommended value for the external capacitor is 0.1 µF.
Figure 9-17. LCD Charge Pump and V
V
LCD
1
0
0
0
MC9S08LC60 Series Advance Information Data Sheet, Rev. 2
0
1
0
0
R1
R1
R1
(~(LCDCPMS) & powersw3)
0
0
1
0
~(LCDCPMS)
LCDCPMS
PRELIMINARY
cap1
NOTE:
and V
LCD
cap2
Voltage Divider Block Diagram
external pins are provided. It
VOLTAGE DIVIDER
BLOCK
CHARGE PUMP
(~(BBYPASS) & powersw3)
(BBYPASS & powersw3)
+
–
Liquid Crystal Display Driver (S08LCDV1)
powersw1
V
LL1
V
DD
V
V
V
powersw2
LL1
LL2
LL3
151
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