MC9S08SG32E1JTGR FREESCALE [Freescale Semiconductor, Inc], MC9S08SG32E1JTGR Datasheet - Page 293

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MC9S08SG32E1JTGR

Manufacturer Part Number
MC9S08SG32E1JTGR
Description
HCS08 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
A.5
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions should be used to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the human body
model (HBM) and the charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
Freescale Semiconductor
ESD Protection and Latch-Up Immunity
1
Latch-up
Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
Model
Human
Body
No.
1
2
3
Series resistance
Storage capacitance
Number of pulses per pin
Minimum input voltage limit
Maximum input voltage limit
Human body model (HBM)
Charge device model (CDM)
Latch-up current at T
Table A-5. ESD and Latch-Up Protection Characteristics
Table A-4. ESD and Latch-up Test Conditions
Description
Rating
MC9S08SG32 Data Sheet, Rev. 7
1
A
= 125°C
Symbol
Symbol
V
V
I
R1
HBM
CDM
LAT
C
± 2000
± 500
± 100
Min
Value
1500
– 2.5
100
7.5
3
Appendix A Electrical Characteristics
Max
Unit
Unit
mA
pF
Ω
V
V
V
V
293

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