COP8ACC720M9-RE NSC [National Semiconductor], COP8ACC720M9-RE Datasheet - Page 10

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COP8ACC720M9-RE

Manufacturer Part Number
COP8ACC720M9-RE
Description
8-Bit CMOS OTP Microcontroller with 16k Memory and High Resolution A/D
Manufacturer
NSC [National Semiconductor]
www.national.com
Typical Performance Characteristics
Pin Descriptions
V
pins must be connected.
CKI is the clock input. This can come from an R/C generated
oscillator, or a crystal oscillator (in conjunction with CKO).
See Oscillator Description section.
RESET is the master reset input. See Reset description sec-
tion.
The device contains two bidirectional (one 8-bit, one 4-bit)
I/O ports (G and L), where each individual bit may be inde-
pendently configured as a weak pullup input, TRI-STATE
(Hi-Z) input or push pull output under program control. Ports
G- and L- feature Schmitt trigger inputs. Three data memory
address locations are allocated for each of these I/O ports.
Each I/O port has two associated 8-bit memory mapped reg-
isters, the CONFIGURATION register and the output DATA
register. A memory mapped address is also reserved for the
input pins of each I/O port. (See the memory map for the
various addresses associated with the I/O ports.) Figure 5
shows the I/O port configurations. The DATA and CONFIGU-
RATION registers allow for each port bit to be individually
configured under software control as shown below:
PORT L is a 4-bit I/O port. All L-pins have Schmitt triggers on
the inputs.
The Port L supports Multi-Input Wake Up on all four pins.
The Port L has the following alternate features:
CC
and GND are the power supply pins. All V
CC
DS012869-36
DS012869-34
and GND
(−55˚C
10
L7
L6
L5
L4
T
MIWU or external interrupt
MIWU or external interrupt
MIWU or external interrupt
MIWU or external interrupt
A
= +125˚C) (Continued)
FIGURE 5. I/P Port Configurations
DS012869-37
DS012869-35
DS012869-5

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