COP8SBR9 NSC [National Semiconductor], COP8SBR9 Datasheet - Page 37

• Manufacturer Part Number: COP8SBR9
• Description: 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout
• Manufacturer: NSC [National Semiconductor]

12.0 Timers
The timer mode control bits (TxC3, TxC2 and TxC1) are
detailed in Table 15, Timer Operating Modes.
When the high speed timers are counting in high speed
mode, directly altering the contents of the timer upper or
lower registers, the PWM outputs or the reload registers is
not recommended. Bit operations can be particularly prob-
13.0 Power Saving Features
Today, the proliferation of battery-operated applications has
placed new demands on designers to drive power consump-
tion down. Battery operated systems are not the only type of
applications demanding low power. The power budget con-
straints are also imposed on those consumer/industrial ap-
plications where well regulated and expensive power supply
costs cannot be tolerated. Such applications rely on low cost
and low power supply voltage derived directly from the
“mains” by using voltage rectifier and passive components.
Low power is demanded even in automotive applications,
due to increased vehicle electronics content. This is required
to ease the burden from the car battery. Low power 8-bit
microcontrollers supply the smarts to control battery-
operated, consumer/industrial, and automotive applications.
The device offers system designers a variety of low-power
consumption features that enable them to meet the demand-
ing requirements of today’s increasing range of low-power
applications. These features include low voltage operation,
low current drain, and power saving features such as HALT,
IDLE, and Multi-Input Wake-Up (MIWU).
This device supports three operating modes, each of which
have two power save modes of operation. The three operat-
Mode
TxENB
1
2
3
Timer Interrupt Enable Flag
1 = Timer Interrupt Enabled
0 = Timer Interrupt Disabled
TxC3
1
1
0
0
0
1
0
1
(Continued)
TxC2
0
0
0
0
1
1
1
1
TxC1
1
0
0
1
0
0
1
1
TABLE 15. Timer Operating Modes
PWM: TxA Toggle
PWM: No TxA
Toggle
External Event
Counter
External Event
Counter
Captures:
TxA Pos. Edge
TxB Pos. Edge
Captures:
TxA Pos. Edge
TxB Neg. Edge
Captures:
TxA Neg. Edge
TxB Pos. Edge
Captures:
TxA Neg. Edge
TxB Neg. Edge
Description
37
lematic. Since any of these six registers or the PWM outputs
can change as many as ten times in a single instruction
cycle, performing an SBIT or RBIT operation with the timer
running can produce unpredictable results. The recom-
mended procedure is to stop the timer, perform any changes
to the timer, the PWM outputs or reload register values, and
then re-start the timer. This warning does not apply to the
timer control register. Any type of read/write operation, in-
cluding SBIT and RBIT may be performed on this register in
any operating mode.
ing modes are: High Speed, Dual Clock, and Low Speed.
Within each operating mode, the two power save modes are:
HALT and IDLE. In the HALT mode of operation, all micro-
controller activities are stopped and power consumption is
reduced to a very low level. In this device, the HALT mode is
enabled and disabled by a bit in the Option register. The
IDLE mode is similar to the HALT mode, except that certain
sections of the device continue to operate, such as: the
on-board oscillator, the IDLE Timer (Timer T0), and the Clock
Monitor. This allows real time to be maintained. During
power save modes of operation, all on board RAM, registers,
I/O states and timers (with the exception of T0) are unal-
tered.
Two oscillators are used to support the three different oper-
ating modes. The high speed oscillator refers to the oscillator
connected to CKI and the low speed oscillator refers to the
32 kHz oscillator connected to pins L0 & L1. When using L0
and L1 for the low speed oscillator, the user must ensure that
the L0 and L1 pins are configured for hi-Z input, L1 is not
using CKX on the USART, and Multi-Input Wake-up for these
pins is disabled.
A diagram of the three modes is shown in Figure 19.
Autoreload RA
Autoreload RA
Timer Underflow
Timer Underflow
Pos. TxA Edge
or Timer
Underflow
Pos. TxA
Edge or Timer
Underflow
Neg. TxA
Edge or Timer
Underflow
Neg. TxA
Edge or Timer
Underflow
Interrupt A
Source
Autoreload RB
Autoreload RB
Pos. TxB Edge
Pos. TxB Edge
Pos. TxB Edge
Neg. TxB
Edge
Pos. TxB
Edge
Neg. TxB
Edge
Interrupt B
Source
t
t
TxA Pos.
Edge
TxA Neg.
Edge
t
t
t
t
C
C
C
C
C
C
Counts On
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or MCLK
or MCLK
or MCLK
or MCLK
or MCLK
or MCLK
Timer