W90N740CD WINBOND [Winbond], W90N740CD Datasheet - Page 13

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W90N740CD

Manufacturer Part Number
W90N740CD
Description
32-Bit ARM7TDMI-Based Micro-Controller
Manufacturer
WINBOND [Winbond]
Datasheets

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5. PIN DESCRIPTION
System Clock & Reset
TAP Interface
External Bus Interface
EXTAL
XTAL
MCLK
nRESET
TCK
TMS
TDI
TDO
nTRST
A [24:22]
A [21:0]
D [31:16]
D [15:0]
nWBE [3:0]/
SDQM [3:0]
nSCS [1:0]
nSRAS
nSCAS
nSWE
MCKE
NC
NC
EMREQ
EMACK
nWAIT
nBTCS
nECS [3:0]
nOE
PIN NAME
IO TYPE
IO
IO
IO
IO
IO
ID
IU
IU
IU
ID
ID
IU
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
External Clock / Crystal Input
Crystal Output
System Master Clock Out, SDRAM clock
System Reset, active-low
JTAG Clock, internal pull-down with 58K ohm
JTAG Mode Select, internal pull-up with 70K ohm
JTAG Data in, internal pull-up with 70K ohm
JTAG Data out
JTAG Reset, active-low, internal pull-up with 70K ohm
Address Bus (MSB) of external memory and IO devices
Address Bus of external memory and IO devices
Data Bus (MSB) of external memory and IO device, internal pull-up with 70K ohm.
Data Bus (LSB) of external memory and IO device
Write Byte Enable for specific device(nECS[3:0]),
Data input/output Mask signal for SDRAM (nSCS[1:0]), active-low
SDRAM chip select for two external banks, active-low.
Row Address Strobe for SDRAM, active-low
Column Address Strobe for SDRAM, active-low
SDRAM Write Enable, active-low
SDRAM Clock Enable, active-high
External Master Bus Request
This is used to request external bus. When EMACK active, indicates the bus grants
the bus, chip drives all the output pins of the external bus to high impedance.
External Bus Acknowledge
External Wait, active-low
This pin indicates that the external devices need more active cycle during access
operation.
ROM/Flash Chip Select, active-low
External I/O Chip Select, active-low.
ROM/Flash, External Memory Output Enable, active-low
- 13 -
W90N740 Reference Manual
DESCRIPTION
Publication Release Date: May 9, 2003
Revision A2

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