XC6108 TOREX [Torex Semiconductor], XC6108 Datasheet - Page 13

• Manufacturer Part Number: XC6108
• Description: Voltage Detector with Separated Sense Pin and Delay Type Capacitor
• Manufacturer: TOREX [Torex Semiconductor]

■OPERATIONAL EXPLANATION
●Release Delay Time Chart
Delay Capacitance [Cd]
① As an early state, the sense pin is applied sufficiently high voltage (6.0V MAX.) and the delay capacitance (Cd) is charged
② When the sense pin voltage keeps dropping and becomes equal to the detect voltage, an N-ch transistor for the delay
③ While the sense pin voltage keeps below the detect voltage, the delay capacitance is discharged to the ground voltage
④ When the sense pin voltage continues to increase up to the release voltage level (V
⑤ While the delay capacitance pin voltage (V
⑥ When the delay capacitance pin voltage reaches to the delay capacitance pin threshold voltage (V
⑦ While the sense voltage is higher than the detect voltage (V
A typical circuit example is shown in Figure 1, and the timing chart of Figure 1 is shown in Figure 2 on the next page.
The release delay time can also be briefly calculated with the formula (2) because the delay resistance is 2.0MΩ(TYP.) and
the delay capacitance pin voltage is V
As an example, presuming that the delay capacitance is 0.68μF, T
* Note that the release delay time may remarkably be short when the delay capacitance is not discharged to the ground
to the power supply input voltage, (V
reach the detect voltage (V
* If a pull-up resistor of the XC6108N series (N-ch open drain) is connected to added power supply different from the input
capacitance discharge is turned ON, and starts to discharge the delay capacitance. For the internal circuit, which uses
the delay capacitance pin as power input, the reference voltage operates as a comparator of V
changes into the “Low” level (=V
V
(=V
release voltage (V
delay capacitance discharge will be turned OFF, and the delay capacitance will start discharging via a delay resistor
(Rdelay). The internal circuit, which uses the delay capacitance pin as power input, will operate as a hysteresis
comparator (Rise Logic Threshold: V
higher than the detect voltage (V
sense pin voltage equal to the release voltage or higher, the sense pin will be charged by the time constant of the RC
series circuit. Assuming the time to the release delay time (T
internal circuit, which uses the delay capacitance pin as power input will be inverted. As a result, the output voltage
changes into the “High” (=V
level without connecting to the Cd.
delay capacitance pin voltage becomes the input voltage level. Therefore, the output voltage maintains the “High”(=V
level.
(=V
voltage pin, the “High” level will be a voltage value where the pull-up resistor is connected.
OUT
SS
SS
0.010
0.022
0.047
0.100
0.220
0.470
1.000
(μF)
of “Low” level (especially, when the Cd pin is not connected: T
) level. Then, the output voltage maintains the “Low” level while the sense pin voltage increases again to reach the
) level because time described in ③ is short.
SEN
< V
DF
DF
IN
+V
Release Delay Time [T
) (V
) level. T
HYS
SS
SEN
SEN
* In = a natural logarithm
).
). The detect delay time [T
T
IN /2
DR
>V
> V
IN
TLH
: 1.0V MIN., 6.0V MAX.). While the sense pin voltage (V
(TYP.)
1380
13.8
30.4
64.9
DF
=
138
304
649
(ms)
DR0
DF
(TYP.)
2.0e6
), the output voltage (V
=V
－
).
CD
Rdelay
is defined as time which ranges from V
TCD
T
) rises to reach the delay capacitance pin threshold voltage (V
DR
×
, Fall Logic Threshold: V
= 2.0e6
0.68e
×
DR
Cd
]
－
×
×
6
In (1
×
Cd
0.69 = 938 (ms)
SEN
×
DR
DF
－
0.69…(2)
OUT
), it can be given by the formula (1).
DR
] is defined as time which ranges from V
V
> V
TCD
DF0
is :
) keeps the “High” level (=V
DF
).
/ V
), the delay capacitance pin is charged until the
Release Delay Time [T
IN
THL
) …(1)
=V
(MIN. ~ MAX.)
1100 ~ 1660
24.3 ~ 36.4
51.9 ~ 77.8
11.0 ~ 16.6
110 ~ 166
519 ~ 778
243~ 364
SS
(ms)
) while the sense pin voltage keeps
SEN
DF
+V
=V
HYS
DF
+V
), the N-ch transistor for the
DR
IN
HYS
IN
]
, and the output voltage
SE
).
CD
to the V
N
=V
) starts dropping to
TCD
SEN
), output of an
OUT
TCD
=V
XC6108
) with the
of “High”
DF
Series
to the
13
IN
)