M38062M3-156FP MITSUBISHI [Mitsubishi Electric Semiconductor], M38062M3-156FP Datasheet - Page 51

• Manufacturer Part Number: M38062M3-156FP
• Description: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

TIMING REQUIREMENTS 1 IN MEMORY EXPANSION MODE AND MICROPROCESSOR MODE (High-speed version)
Note 1:
SWITCHING CHARACTERISTICS 1 IN MEMORY EXPANSION MODE AND MICROPROCESSOR MODE
(High-speed version)
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
d(RESET–RESET
su(ONW– )
h( –ONW)
su(DB– )
h( –DB)
su(ONW–RD)
su(ONW–WR)
h(RD–ONW)
h(WR–ONW)
su(DB–RD)
h(RD–DB)
c( )
wH( )
wL( )
d( –AH)
v( –AH)
d( –AL)
v( –AL)
d( –SYNC)
v( –SYNC)
d( –DB)
v( –DB)
wL(RD)
wL(WR)
d(AH–RD)
d(AH–WR)
d(AL–RD)
d(AL–WR)
v(RD–AH)
v(WR–AH)
v(RD–AL)
v(WR–AL)
d(WR–DB)
v(WR–DB)
v( –RESET)
Symbol
Symbol
___ _____
___
___
___
___ ____
__
__
___
__ ____
__
____ __
____ ___
____
___
__
____
_____
___
__
___
__
__
The RESET
the RESET input goes “H”.
OUT
______
)
_________
___
___
Before
After
Before
After
Before RD ONW input set up time
Before WR ONW input set up time
After RD ONW input hold time
After WR ONW input hold time
Before RD data bus set up time
After RD data bus hold time
After
After
After
After
SYNC delay time
SYNC valid time
After
After
RD pulse width, WR pulse width
RD pulse width, WR pulse width
(when one-wait is valid)
After AD
After AD
After AD
After AD
After RD AD
After WR AD
After RD AD
After WR AD
After WR data bus delay time
After WR data bus valid time
_________
RESET
_________
RESET
clock cycle time
clock “H” pulse width
clock “L” pulse width
___ _____
___ _____
___
___
___
___
___
___
___
OUT
_____
ONW input hold time
data bus hold time
___ _____
___
AD
AD
AD
AD
data bus delay time
data bus valid time
___ _____
OUT
OUT
15
15
7
7
_____
ONW input set up time
data bus set up time
–AD
–AD
7
output goes “H” in sync with the fall of the
15
15
7
–AD
–AD
–AD
–AD
output delay time (Note 1)
output valid time (Note 1)
–AD
–AD
15
7
15
7
–AD
0
–AD
0
–AD
8
–AD
8
___
RD delay time
___
WR delay time
0
0
___
___
___
RD delay time
___
WR delay time
8
8
delay time
valid time
0
Parameter
0
delay time
valid time
8
8
valid time
valid time
valid time
valid time
Parameter
(V
(V
CC
CC
= 4.0 to 5.5 V, V
= 4.0 to 5.5 V, V
clock that is anywhere between about 8 cycle and 13 cycles after
Test conditions
Fig. 32
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
SS =
SS =
0 V, T
0 V, T
MITSUBISHI MICROCOMPUTERS
a
a
= –20 to 85 C, unless otherwise noted)
= –20 to 85 C, unless otherwise noted)
3t
t
t
t
t
t
c(X
c(X
c(X
c(X
c(X
c(X
Min.
IN
IN
10
IN
IN
IN
10
IN
Min.
2
2
2
2
0
–20
–20
–20
–20
)
)
)
)
)
–10
–10
–10
)
–35
–40
50
50
–10
0
0
Limits
t
t
c(X
c(X
2t
3806 Group
Limits
Typ.
Typ.
c(X
25
25
16
20
16
15
15
IN
IN
5
5
5
5
5
)
)
–16
–20
IN
)
Max.
Max.
200
100
35
40
30
30
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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