XR16M2651IL32 EXAR [Exar Corporation], XR16M2651IL32 Datasheet - Page 50

• Manufacturer Part Number: XR16M2651IL32
• Description: HIGH PERFORMANCE DUART WITH 32-BYTE FIFO AND POWERSAVE FEATURE
• Manufacturer: EXAR [Exar Corporation]

XR16M2651
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO AND POWERSAVE FEATURE
GENERAL DESCRIPTION ................................................................................................ 1
PIN DESCRIPTIONS ........................................................................................................ 3
1.0 PRODUCT DESCRIPTION....................................................................................................................... 7
2.0 FUNCTIONAL DESCRIPTIONS............................................................................................................... 8
3.0 UART INTERNAL REGISTERS ............................................................................................................. 23
4.0 INTERNAL REGISTER DESCRIPTIONS............................................................................................... 25
A
F
ORDERING INFORMATION
EATURES
PPLICATIONS
2.1 CPU INTERFACE................................................................................................................................................. 8
2.2 DEVICE RESET ................................................................................................................................................... 8
2.3 DEVICE IDENTIFICATION AND REVISION........................................................................................................ 9
2.4 CHANNEL A AND B SELECTION....................................................................................................................... 9
2.5 DMA MODE........................................................................................................................................................ 10
2.6 INTA AND INTB OUTPUTS ............................................................................................................................... 10
2.7 CRYSTAL OSCILLATOR OR EXTERNAL CLOCK INPUT .............................................................................. 11
2.8 PROGRAMMABLE BAUD RATE GENERATOR WITH FRACTIONAL DIVISOR............................................ 11
2.9 TRANSMITTER .................................................................................................................................................. 13
2.10 RECEIVER ....................................................................................................................................................... 15
2.11 AUTO RTS (HARDWARE) FLOW CONTROL ................................................................................................ 16
2.12 AUTO RTS HYSTERESIS............................................................................................................................... 17
2.13 AUTO CTS FLOW CONTROL ........................................................................................................................ 17
2.14 AUTO XON/XOFF (SOFTWARE) FLOW CONTROL...................................................................................... 19
2.15 SPECIAL CHARACTER DETECT .................................................................................................................. 19
2.16 INFRARED MODE ........................................................................................................................................... 20
2.17 SLEEP MODE WITH WAKE-UP INDICATOR AND POWERSAVE FEATURE............................................. 21
2.18 INTERNAL LOOPBACK ................................................................................................................................. 22
4.1 RECEIVE HOLDING REGISTER (RHR) - READ- ONLY .................................................................................. 25
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY ............................................................................... 25
4.3 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE................................................................................. 25
F
F
F
T
T
T
T
T
F
F
T
F
F
F
F
T
F
T
F
F
T
T
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
ABLE
IGURE
IGURE
IGURE
IGURE
ABLE
IGURE
ABLE
IGURE
IGURE
ABLE
ABLE
2.9.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY ........................................................................................... 14
2.9.2 TRANSMITTER OPERATION IN NON-FIFO MODE .................................................................................................... 14
2.9.3 TRANSMITTER OPERATION IN FIFO MODE ............................................................................................................. 14
2.10.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY ............................................................................................ 15
2.17.1 SLEEP MODE ............................................................................................................................................................. 21
2.17.2 POWERSAVE FEATURE............................................................................................................................................ 21
4.3.1 IER VERSUS RECEIVE FIFO INTERRUPT MODE OPERATION ............................................................................... 25
1: C
2: C
3: TXRDY#
4: INTA
5: INTA
6: T
7: A
8: A
9: UART CHANNEL A AND B UART INTERNAL REGISTERS ....................................................................................... 23
10: INTERNAL REGISTERS DESCRIPTION. S
1. XR16M2651 B
2. P
3. XR16M2651 T
4. T
5. B
6. T
7. T
8. R
9. R
10. A
11. I
12. I
.................................................................................................................................................... 1
YPICAL DATA RATES WITH A
UTO
UTO
HANNEL
HANNEL
YPICAL
RANSMITTER
RANSMITTER
IN
AUD
ECEIVER
ECEIVER
NFRARED
NTERNAL
............................................................................................................................................... 1
UTO
O
AND
AND
RTS (H
X
UT
R
ON
RTS
ATE
AND
C
A
A
A
INTB P
INTB P
/X
RYSTAL CONNECTIONS
O
O
SSIGNMENT
AND
AND
L
OFF
T
G
PERATION IN NON
PERATION IN
OOP
ARDWARE
AND
RANSMIT
RXRDY# O
ENERATOR
O
O
................................................................................................................................ 2
LOCK
YPICAL
B S
B S
PERATION IN NON
PERATION IN
(S
INS
IN
CTS F
B
OFTWARE
ACK IN
ELECT IN
ELECT IN
O
O
D
PERATION
..................................................................................................................................................... 2
D
I
) F
IAGRAM
PERATION FOR
NTEL
ATA
LOW
............................................................................................................................................... 12
FIFO
UTPUTS IN
LOW
C
24 MH
) F
HANNEL
/M
E
16 M
68 M
FIFO
C
-FIFO M
NCODING AND
C
OTOROLA
........................................................................................................................................ 1
LOW
ONTROL
AND
TABLE OF CONTENTS
F
ONTROL
................................................................................................................................... 11
OR
-FIFO M
ODE
ODE
Z CRYSTAL OR EXTERNAL CLOCK AT
AND
C
A
FIFO
A
R
ONTROL
UTO
T
ODE
ECEIVER
AND
RANSMITTER
............................................................................................................................ 9
............................................................................................................................ 9
O
F
D
........................................................................................................................ 17
LOW
PERATION
ODE
RTS F
ATA
AND
.................................................................................................................... 15
B ................................................................................................................ 22
R
ECEIVE
C
B
.............................................................................................................. 14
............................................................................................................... 19
DMA M
HADED BITS ARE ENABLED WHEN
ONTROL
............................................................................................................. 10
US
LOW
....................................................................................................... 18
I
NTERCONNECTIONS
...................................................................................................... 10
I
D
C
ODE
ATA
ONTROL
M
ODE
D
........................................................................................... 10
ECODING
..................................................................................... 14
M
ODE
16X S
.......................................................................... 20
......................................................................... 16
.......................................................................... 8
AMPLING
EFR B
................................................... 13
IT
-4=1 ....................................... 24
REV. 1.0.2