PEX8606-bA50BC PLX [PLX Technology], PEX8606-bA50BC Datasheet
PEX8606-bA50BC
Manufacturer Part Number
PEX8606-bA50BC
Description
Manufacturer
PLX [PLX Technology]
Datasheet
1.PEX8606-BA50BC.pdf
(4 pages)
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PEX8606-bA50BC G
Manufacturer:
PLX
Quantity:
20 000
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PEX8606-bA50BCG
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SAMSUNG
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Features
PEX 8606 General Features
o 6-lane PCI Express switch
o Up to 6 configurable ports
o 15 x 15mm
o Typical Power: 1.34 Watts
PEX 8606 Key Features
o Standards Compliant
o High Performance
o Dual-Host & Fail-Over Support
o Flexible Configuration
o PCI Express Power Management
o Spread Spectrum Clock Isolation
o Quality of Service (QoS)
o Reliability, Availability, Serviceability
- Integrated 5.0 GT/s SerDes
- PCI Express Base Specification r2.0
- PCI Power Management Spec r1.2
- Microsoft Vista Compliant
- Supports Access Control Services
- Dynamic link-width control
- Dynamic SerDes Speed Control
- Non-blocking internal architecture
- Full line rate on all ports
- Cut-Thru latency: 190ns
- 2KB max payload size
- Read Pacing
- Dual Cast
- Configurable Non-Transparent port
- Moveable upstream port
- Crosslink port capability
- 6 flexible & configurable ports
- Configurable with strapping pins,
- Lane and polarity reversal
- Link power management states: L0, L0s,
- Device states: D0 and D3
- Dual clock domain
- Two Virtual Channels (VC) per port
- Eight Traffic Classes per port
- Weighted Round-Robin Port & VC
- All ports Hot-Plug capable thru I
- ECRC & Poison bit support
- Data path protection
- Memory (RAM) error correction
- Advanced Error Reporting support
- Port Status bits and GPIO available
- Per port error diagnostics
- Performance monitoring
- JTAG AC/DC boundary scan
- Fatal Error (FATAL_ERR#) output signal
-
(Backwards compatible with PCIe
r1.0a/1.1)
(intelligent bandwidth allocation)
(x1 or x2)
EEPROM, I
L1, L2/L3 Ready, and L3
Arbitration
(Hot-Plug Controller on every port)
(per port payload & header counters)
INTA# output signal
Version 1.2 2009
2
, 196-ball PBGA
2
C, or Host software
hot
2
C
The ExpressLane
enabling users to add scalable high bandwidth non-blocking interconnection to a
wide variety of applications including communications platforms, control plane
applications and embedded systems. The PEX 8606 is well suited for fan-out,
aggregation, peer-to-peer, and intelligent I/O module applications
Low Packet Latency & High Performance
The PEX 8606 architecture supports packet cut-thru with a maximum latency of
190ns in x1 to x1 configuration. This, combined with large packet memory and
non-blocking internal switch architecture, provides full line rate on all ports for low-
latency applications such as communications and embedded. The low latency
enables applications to achieve high throughput and performance. In addition to low
latency, the device supports a max payload size of 2048 bytes, enabling the user to
achieve even higher throughout
Data Integrity
The PEX 8606 provides end-to-end CRC protection (ECRC) and Poison bit support
to enable designs that require guaranteed error-free packets. PLX also supports
data path parity and memory (RAM) error correction as packets pass through the
switch
Dual-Host and Fail-Over Support
The PEX 8606 supports full non-transparent bridging (NTB) functionality to allow
implementation of multi-host systems and intelligent I/O modules in applications
which require redundancy support such as communications, storage, and servers.
Non-transparent bridges allow systems to isolate host memory domains by
presenting the processor subsystem as an endpoint rather than another memory
system. Base address registers are used to translate addresses; doorbell registers are
used to send interrupts between the address domains; and scratchpad registers are
accessible from both address domains to allow inter-processor communication
Interoperability
The PEX 8606 is designed to be fully compliant with the PCI Express Base
Specification r2.0 and is backwards compatible to PCI Express Base Specification
r1.1 and r1.0a. Additionally each port supports auto-negotiation, lane reversal and
polarity reversal. Furthermore, the PEX 8606 is designed for Microsoft Vista
compliance. All PLX switches undergo thorough interoperability testing in PLX’s
Interoperability Lab and compliance testing at the PCI-SIG plug-fest to ensure
compatibility with PCI Express devices in the market.
Device Operation Configuration Flexibility
The PEX 8606 provides several ways to configure its operations. The device can be
configured through strapping pins, I
optional serial EEPROM. This allows for easy debug during the development phase
and functional monitoring during the operation phase
PCIe Gen2, 5.0 GT/s 6-lane 6-port PCI Express
.
PEX 8606
™
PEX 8606 device offers PCI Express switching capability
.
2
C interface, CPU configuration cycles and/or an
.
.
®
Switch
.
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PEX8606-bA50BC Summary of contents
Page 1
Version 1.2 2009 Features PEX 8606 General Features o 6-lane PCI Express switch - Integrated 5.0 GT/s SerDes configurable ports 15mm , 196-ball PBGA o Typical Power: 1.34 Watts PEX 8606 Key ...
Page 2
Flexible Port Configurations The PEX 8606 supports the port configurations as shown in figure 1 below. The figure shows a 6-port configuration and a 5-port configuration. Figure 1. Port Configurations Hot-Plug for High Availability Hot-Plug capability allows users to replace ...
Page 3
Docking Station Application The PEX 8606 is ideal for IO expansion applications. The support for SSC isolation as well as its low power consumption makes it an ideal candidate for peripheral expansion. Figure 3 below shows a block diagram for ...
Page 4
... Product Ordering Information PLX Technology, Inc. 870 W. Maude Ave. Part Number Sunnyvale, CA 94085 USA PEX8606-bA50BC Tel: 1-800-759-3735 PEX8606-bA50BC G Tel: 1-408-774-9060 PEX 8606bA-AIC1U1D RDK Fax: 1-408-774-2169 Please visit the PLX Web site at info@plxtech.com www.plxtech.com © 2009 by PLX Technology, Inc. All rights reserved. PLX and the PLX logo are registered trademarks of PLX Technology, Inc. ExpressLane is a trademark of PLX Technology, Inc ...