M24LR64-RDW6T2 STMICROELECTRONICS [STMicroelectronics], M24LR64-RDW6T2 Datasheet - Page 48
M24LR64-RDW6T2
Manufacturer Part Number
M24LR64-RDW6T2
Description
64 Kbit EEPROM with password protection & dual interface
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.M24LR64-RDW6T2.pdf
(128 pages)
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Bit representation and coding
11
11.1
11.1.1
48/128
Bit representation and coding
Data bits are encoded using Manchester coding, according to the following schemes. For
the low data rate, same subcarrier frequency or frequencies is/are used, in this case the
number of pulses is multiplied by 4 and all times will increase by this factor. For the Fast
commands using one subcarrier, all pulse numbers and times are divided by 2.
Bit coding using one subcarrier
High data rate
A logic 0 starts with 8 pulses at 423.75 kHz (f
18.88 µs as shown in
Figure 23. Logic 0, high data rate
For the fast commands, a logic 0 starts with 4 pulses at 423.75 kHz (f
unmodulated time of 9.44 µs as shown in
Figure 24. Logic 0, high data rate x2
A logic 1 starts with an unmodulated time of 18.88 µs followed by 8 pulses at 423.75 kHz
(f
Figure 25. Logic 1, high data rate
For the Fast commands, a logic 1 starts with an unmodulated time of 9.44 µs followed by 4
pulses of 423.75 kHz (f
Figure 26. Logic 1, high data rate x2
C
/32) as shown in
Figure
Figure
C
/32) as shown in
25.
23.
Doc ID 15170 Rev 10
37.76µs
37.76µs
Figure
Figure
18.88µs
18.88µs
C
/32) followed by an unmodulated time of
26.
24.
ai12067
ai12066
ai12077
ai12076
C
/32) followed by an
M24LR64-R
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