EN5360DC ENPIRION [Enpirion, Inc.], EN5360DC Datasheet
EN5360DC
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EN5360DC Summary of contents
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... DSPs, FPGAs, and ASICs VID Output • Low voltage, distributed power architectures with Voltage Select 2.5V, 3. rails V OUT Ordering Information 47µF Part Number EN5360DC EN5360DC-T EN5360DI EN5360DI-T EN5360DC-E 1 EN5360 DC-DC Converter =3.3V) OUT -600mV IN Temp Rating (°C) Package 48-pin DFN 48-pin DFN T&R ...
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Rev 1.0 – July 2005 Pin Configuration This diagram is a top-view of the component and represents the on-board layout requirements for the landing pads and thermal connection points. Specific dimensions for the pads are presented on page 10. Pin ...
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Rev 1.0 – July 2005 Typical Efficiency V = 3.3V and V = 2.5V IN OUT 95.0% 90.0% 85.0% 80.0% 75.0% 70.0% 0.3 Waveforms 1.0 2.0 3.0 Output Current (A) 3 EN5360 4.0 5.0 6.0 5Vin / 1.2Vout 6A load ...
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Rev 1.0 – July 2005 Absolute Maximum Ratings CAUTION: Stresses in excess of the absolute maximum ratings may cause permanent damage to the device. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability. PARAMETER Input Supply ...
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Rev 1.0 – July 2005 Electrical Characteristics NOTE: V =3.3V and over operating temperature range unless otherwise noted. Typical values are 25°C. PARAMETER SYMBOL Operating Input V IN Voltage Quiescent Supply I Q Current No-Load Operating I ...
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Rev 1.0 – July 2005 Pin Descriptions PIN NAME Output of the buffer leading to the error amplifier. Used for external modifications of 1 COMP the compensation network. External feedback voltage input. Option for programming the output voltage with a ...
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Rev 1.0 – July 2005 PIN NAME VS2 Voltage select line 2 input. See Table 1. 42 ROCP Over-Current trip point adjust input. Used for adjusting the OCP trip point. 43 VS1 Voltage select line ...
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Rev 1.0 – July 2005 It is recommended that Rb1 and Rb2 resistor values be ~2kΩ. Use the following equation to set the resistor Ra1 for the desired output voltage: − Vout V ...
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Rev 1.0 – July 2005 Power Up Sequencing The sequencing of AVIN, PVIN and ENABLE should meet the following requirements: 1. ENABLE should not be asserted before PVIN. 2. PVIN should not be applied before AVIN. Note that tying AVIN, ...
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Rev 1.0 – July 2005 output filter capacitors relative to their respective pins is very critical. The input capacitors should be placed such that they have the lowest inductance traces to PVIN and PGND pins 28-33. The output filter capacitors ...
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Rev 1.0 – July 2005 Landing Pad Information The Enpirion DFN package is footprint compatible with the JEDEC standard 40-pin TSSOP package code DE that has been extended to 17mm and 48-pins. The reference document and board layout diagram appear ...