RT8259 RICHTEK [Richtek Technology Corporation], RT8259 Datasheet - Page 10

• Manufacturer Part Number: RT8259
• Description: 1.2A, 24V, 1.4MHz Step-Down Converter
• Manufacturer: RICHTEK [Richtek Technology Corporation]

RT8259
Thermal Considerations
For continuous operation, do not exceed the maximum
operation junction temperature 125°C. The maximum power
dissipation depends on the thermal resistance of IC
package, PCB layout, the rate of surroundings airflow and
temperature difference between junction to ambient. The
maximum power dissipation can be calculated by following
formula :
P
where T
temperature, T
the junction to ambient thermal resistance.
For recommended operating conditions specification of the
RT8259, the maximum junction temperature of the die is
125°C. The junction to ambient thermal resistance θ
layout dependent. For T/SOT-23-6 package, the thermal
resistance θ
layers thermal test board. The maximum power dissipation
at T
P
T/SOT-23-6 packages
The maximum power dissipation depends on operating
ambient temperature for fixed T
θ
allows the designer to see the effect of rising ambient
temperature on the maximum power allowed.
www.richtek.com
10
JA
D(MAX)
D(MAX)
. For RT8259 packages, the Figure 3 of derating curves
A
Figure 3. Derating Curves for RT8259 Packages
= 25°C can be calculated by following formula :
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
= (T
= (125°C − 25°C) / (250°C/W) = 0.4W
J(MAX)
0
J(MAX)
JA
is 120°C/W on standard JEDEC 51-7 four-
A
is the ambient temperature and the θ
is the maximum operation junction
− T
25
Ambient Temperature (°C)
A
) / θ
JA
50
J(MAX)
T/SOT-23-6
and thermal resistance
75
Single Layer
100
PCB
JA
JA
for
125
is
is
Layout Consideration
Follow the PCB layout guidelines for optimal performance
of RT8259.
Keep the traces of the main current paths as short and
wide as possible.
Put the input capacitor as close as possible to the device
pins (VIN and GND).
LX node is with high frequency voltage swing and should
be kept at small area. Keep sensitive components away
from the LX node to prevent stray capacitive noise pick-
up.
Place the feedback components to the FB pin as close
as possible.
Connect GND to a ground plane for noise reduction and
thermal dissipation.
V
OUT
R2
R1
Figure 4. PCB Layout Guide
BOOT
GND
FB
2
3
1
C
B
6
5
4
DS8259-03 March 2011
PHASE
VIN
EN
V
OUT
L1
C
OUT
C
D1
IN
GND