RT9807 RICHTEK [Richtek Technology Corporation], RT9807 Datasheet - Page 6

• Manufacturer Part Number: RT9807
• Description: Micro-Power Voltage Detector with Manual Reset
• Manufacturer: RICHTEK [Richtek Technology Corporation]

RT9807
Interfacing to Other Voltages
The RT9807 is an open-drain voltage detector that can
provide different voltage level of reset signals for processor
application. As shown in Figure 4, the open-drain output
can be connected to another voltage level less than 5.5V.
This allows for easy logic compatibility to various
microprocessors.
Manual Reset Input
Many processor based products require manual reset
capability, allowing the user or external logic circuitry to
initiate a reset. A logic low on MR asserts reset. Reset
remains asserted while MR is low and for the reset timeout
period after MR returns high. Connect a normally open
momentary switch from MR to ground to create a manual
reset function.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
P
where T
temperature, T
the junction to ambient thermal resistance.
For recommended operating conditions specification of
the RT9807, the maximum junction temperature is 125°C.
The junction to ambient thermal resistance θ
dependent. For SOT-23-5 package, the
θ
thermal test board. The maximum power dissipation at
www.richtek.com
6
JA
D(MAX)
is 250°C/W on the standard JEDEC 51-3 single layer
= ( T
J(MAX)
operation junction temperature. The maximum
System
J(MAX)
5V
5V
A
RST
is the maximum operation junction
is the ambient temperature and the θ
− T
A
) / θ
470k
Figure 4
JA
RST
RT9807
GND
VDD
thermal resistance
3.3V
JA
1µF
is layout
JA
is
T
P
SOT-23-5 package
The maximum power dissipation depends on operating
ambient temperature for fixed T
resistance θ
in Figure 5 allows the designer to see the effect of rising
ambient temperature on the maximum power dissipation.
Layout Considerations
CT is a precise current
layout for the application, be careful to minimize board
capacitance and leakage currents around this pin.
Traces connected to CT should be kept as short as
possible. Traces carrying high-speed digital signals and
traces with large voltage potentials should be routed as
far from CT as possible. Leakage current and stray
capacitance (e.g., a scope probe) at this pin can cause
errors in the reset delay time.
A
D(MAX)
= 25°C can
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
Figure 5. Derating Curve for RT9807 Package
= (125°C − 25°C) / (250°C/W) = 0.4W for
0
SW
JA
. For RT9807 package, the derating curve
Figure 6. PCB Layout Guide
be calculated by the following formula :
GND
RST
MR
25
Ambient Temperature (°C)
1
2
3
C
close as possible to the IC.
source. When developing the
CT
R
50
should be placed as
5
4
GND
VDD
CT
DS9807-01 April 2011
75
J(MAX)
Single Layer PCB
C
SOT-23-5
IN
C
and thermal
100
CT
125