RT9641AGS RICHTEK [Richtek Technology Corporation], RT9641AGS Datasheet - Page 7

• Manufacturer Part Number: RT9641AGS
• Description: Triple Linear Regulator Controller Support ACPI Control Interface
• Manufacturer: RICHTEK [Richtek Technology Corporation]

this pin to the gate of a suitable N-MOS transistor or the
base of a suitable NPN transistor.
VSEN2 (Pin 16)
Connect this pin to the memory output (V
states, this pin is regulated to 2.5V(2.6V) or 3.3V(3.43V)
(based on R
capable of delivering 300mA (Typically). The active-state
voltage at this pin is regulated through an external NPN
or NMOS transistor connected at the DRV2 pin for both
2.5V(2.6V) and 3.3V(3.43V) setting. During all operating
states, the voltage at this pin is monitored for under-voltage
events.
Application Information
Operation
The RT9641A/B controls 3 output voltages. It is designed
for microprocessor computer applications with 3.3V, 5V,
5VSB, and 12V outputs from an ATX power supply. The IC
is composed of two linear controllers supplying the PCI
slots' 3.3V
RDRAM or 3.3V SDRAM memory power (2.5V/3.3V
(2.6V/3.43V) V
supplying the 5V
control and monitoring functions necessary for complete
ACPI implementation are integrated into the RT9641A/B.
Initialization
The RT9641A/B automatically initializes upon receipt of
input power. The Power-On Reset (POR) function
continually monitors the 5VSB input supply voltage,
initiating soft-start operation after it exceeds its POR
threshold (in S4/S5 states). The 5VSB POR trip event is
also used to lock in the memory voltage setting based on
R
The RT9641A/B forces the operation mode to start from
S4/S5 states at POR releasing
voltages under control of EN3VDL and EN5VDL input
signals.
DS9641A/B-11 March 2007
SEL
.
AUX
SEL
MEM
power (3.3V
) through an internal pass transistor
DUAL
, V
OUT2
voltage (V
), and a dual switch controller
DUAL
with 3.3V
OUT3
, V
OUT1
). In addition, all the
DUAL
) and the 2.5V
OUT2
and 5V
). In sleep
DUAL
Table 2. 5VDUAL Output (V
Very similarly, Table 2 details the fact that EN5VDL status
controls whether the 5V
Note: Combination not allowed.
Table 1. 3.3V
Note: Combination not allowed.
As seen in Table 1, EN3VDLsimply controls whether the
3.3V
state.
Operational Truth Tables
The EN3VDL and EN5VDL pins offer a host of choices in
terms of the overall system architecture and supported
features. Tables 1~3 describe the truth combinations
pertaining to each of the three outputs.
EN3VDL S5 S3 3V3DL
EN5VDL S5 S3 5VDL
0
0
0
0
1
1
1
1
DUAL
0
0
0
0
1
1
1
1
plane remains powered up during S4/S5 sleep
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
DUAL
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Output (V
3.3V
3.3V
Note
3.3V
3.3V
3.3V
Note
0V
Note
Note
DUAL
5V
0V
0V
5V
5V
5V
plane supports sleeps states.
S0, S1 States (Active)
S3
Maintains Previous State
S4/S5
S0, S1 States (Active)
S3
Maintains Previous State
S4/S5
OUT3
OUT1
S0, S1 States(Active)
S3
Maintains Previous State
S4/S5
S0, S1 States(Active)
S3
Maintains Previous State
S4/S5
RT9641A/B
) Truth Table
) Truth Table
Comments
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