AIC1341 Analog Intergrations Corporation, AIC1341 Datasheet - Page 8

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AIC1341

Manufacturer Part Number
AIC1341
Description
High Performance/ Triple-Output/ Auto-Tracking Combo Controller
Manufacturer
Analog Intergrations Corporation
Datasheet

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DESCRIPTION
The AIC1341 is designed for applications with
multiple voltage demand. This IC has one PWM
controller and two linear controllers. The PWM
controller is designed to regulate the voltage
(V
L
configuration. The voltage is regulated to a level,
which is decided by a resistor devide network.
The Power-On Reset (POR) function continually
monitors the input supply voltage +12V at VCC
pin, the 5V input voltage at OCSET pin, and the
3.3V input at VIN2 pin. The POR function initiates
soft-start operation after all three input supply
voltage exceeds their POR thresholds.
Soft-Start
The POR function initiates the soft-start sequence.
Initially, the voltage on SS pin rapidly increases to
approximate 1V. Then an internal 10µA current
source charges an external capacitor (C
SS pin to 4V. As the SS pin voltage slews from
1V to 4V, the PWM error amplifier reference input
(Non-inverting terminal) and output (COMP1 pin) is
clamped to a level proportional to the SS pin volt-
age. As the SS pin voltage slew from 1V to 4V,
the output clamp generates PHASE pulses of i n -
creasing width that charge the output capacitors.
Additionally both linear regulator’s reference in-
puts are clamped to a voltage proportional to the
SS pin voltage. This method provides a controlled
output voltage smooth rise.
Fig.3 shows the soft-start sequence for the typical
application. The internal oscillator’s triangular
waveform is compared to the clamped error ampli-
fier output voltage. As the SS pin voltage in-
creases, the pulse width on PHASE pin increases.
The interval of increasing pulse width continues
until output reaches sufficient voltage to transfer
control to the input reference clamp.
Each linear output (V
follows a ramp. When each output reaches suffi-
GATE
OUT1
) in a synchronous rectified buck converter
) by driving 2 MOSFETs ( B y U
OUT2
and V
OUT3
SS
GATE
) initially
) on the
and
cient voltage the input reference clamp slows the
rate of output voltage rise.
Over-Current Protection
All outputs are protected against excessive over-
current.
MOSFET’s on-resistance, R
current for protection against shorted outputs.
Both the linear regulator and controller monitor
FB2 and FB3 for under-voltage to protect against
excessive current.
When the voltage across Q1 (I
ceeds the level (200 A•R
hibit all outputs. Discharge soft-start capacitor
(C
counter. Css recharges and initiates a soft-start
cycle again until the counter increments to 3. This
sets the fault latch to disable all outputs. Fig. 2
illustrates the over-current protection until an over
load on OUT1.
Should excessive current cause FB2 or FB3 to fall
below the linear under-voltage threshold, the LUV
signal sets the over-current latch if Css is fully
charged. Cycling the bias input power off then on
reset the counter and the fault latch.
The over-current function for PWM controller will
trip at a peak inductor current (I
by:
The OC trip point varies with MOSFET’s tempera-
ture. To avoid over-current tripping in the normal
operating load range, determine the R
tor from the equation above with:
1. The maximum R
2. The minimum I
3. Determine I
ss
current) /2.
) with 10 A current sink, and increments the
The
I
PEAK
PEAK
PWM
OCSET
DS(ON)
> I
I
OCSET
from the specification table.
OUT(MAX
R
controller
at the highest junction.
DS(ON)
OCSET
DS(ON)
R
OCSET
)
PEAK
+ (inductor ripple
D
), this signal i n -
AIC1341
• R
to monitor the
uses
) determined
DS(ON)
OCSET
upper
resis-
) ex-
8

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