LM9040M National Semiconductor, LM9040M Datasheet - Page 4

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LM9040M

Manufacturer Part Number
LM9040M
Description
Dual Lambda Sensor Interface Amplifier
Manufacturer
National Semiconductor
Datasheets

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Circuit Description
The LM9040 is fabricated in CMOS technology and is de-
signed to operate from a single well regulated 5V supply
The IC consists of two independent differential amplifiers
which are designed using two-phased switched capacitor
networks (SCN) The differential inputs have a common
mode operating range of 2V above and below ground The
SCN includes the input sampling the lowpass filter cold
sensor bias voltage and the gain circuitry Each amplifier
has an independent voltage comparator to detect an open
inverting input pin Additional support circuitry includes the
oscillator clock generator and V
Oscillator
The device contains an internal oscillator which is used to
drive the internal two-phase clock generator The oscillator
requires an external resistor value of 178 k
‘‘OSC RES’’ pin to device V
mines the charge rate of the internal capacitor and thus
sets the oscillator frequency The internal oscillator capaci-
tor is matched to the switched capacitor networks so that
the absolute capacitance values are not as important as is
the absolute ratios of the capacitors The oscillator frequen-
cy is approximately 200 kHz
FIGURE 3 Simplified Circuit
CC
BB
This resistor value deter-
bias generator
TL H 12372– 13
from the
4
The oscillator resistor should be located as close to the
OSC RES pin as possible Any variation of the oscillator
resistor value any stray capacitance on the OSC RES pin
or any changes in the supply voltage will result in a change
in the oscillator frequency This will directly affect the device
Differential Input Impedance and Low Pass filter response
Additional circuitry takes the oscillator signal and generates
two non-overlapping clock signals and a CLK OUT signal
The clock signals operate at one half the oscillator frequen-
cy or typically 100 kHz This results in a Nyquist frequency
of typically 50 kHz
Clock Out Clock In
For the input stage to work with common mode voltages
below Ground potential a negative bias voltage (V
needed The CLK OUT pin is used to provide the AC sig-
nal needed to drive the internal V
an external coupling capacitor A minimum coupling capaci-
tor value of 100 pF to a maximum value of 0 1 F is recom-
mended The CLK IN pin is the input to the V
erator circuitry
Differential Input Circuit
The input stage can be best described as a switched Sam-
ple and Difference circuit (see Figure 4 ) When the input
capacitor C
put voltage plus the common mode voltage is stored on C
When C
charged by an amount equal to the common mode voltage
The remaining charge across C
ential input voltage and a proportional charge will be trans-
ferred through the virtual ground via the gain stage
FIGURE 4 Simplified Switched Capacitor Input Circuit
IN
is switched to the inverting input C
IN
is switched to the non-inverting input the in-
IN
BB
will be equal to the differ-
bias generator through
IN
BB
TL H 12372 – 14
will be dis-
bias gen-
BB
) is
IN

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