SAF-C164SL Infineon Technologies, SAF-C164SL Datasheet - Page 215
SAF-C164SL
Manufacturer Part Number
SAF-C164SL
Description
16-Bit CMOS Microcontroller
Manufacturer
Infineon Technologies
Datasheet
1.SAF-C164SL.pdf
(484 pages)
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Timer 3 in Incremental Interface Mode
Incremental Interface Mode for the core timer T3 is selected by setting bit field T3M in
register T3CON to ‘110
timer T3 (T3IN, T3EUD) are used to interface to an incremental encoder. T3 is clocked
by each transition on one or both of the external input pins to provide 2-fold or 4-fold
resolution of the encoder input.
Figure 10-6 Block Diagram of Core Timer T3 in Incremental Interface Mode
Bitfield T3I in control register T3CON selects the triggering transitions (see
In this mode, the sequence of the transitions of the two input signals is evaluated and
generates count pulses as well as the direction signal. T3 is modified automatically
according to the speed and the direction of the incremental encoder and, therefore, its
contents therefore always represent the encoder’s current position.
Table 10-6
T3I
0 0 0
0 0 1
0 1 0
0 1 1
1 X X
User’s Manual
T3IN = P3.6
T3EUD = P3.4
T3IN
T3EUD
Triggering Edge for Counter Increment/Decrement
None. Counter T3 stops.
Any transition (rising or falling edge) on T3IN.
Any transition (rising or falling edge) on T3EUD.
Any transition (rising or falling edge) on any T3 input (T3IN or T3EUD).
Reserved. Do not use this combination.
GPT1 Core Timer T3 (Incremental Interface Mode) Input Edge Selection
Select
Detect
Phase
Edge
T3l
B
’. In incremental interface mode, the two inputs associated with
T3UD
T3R
XOR
T3UDE
0
1
10-9
MUX
Up/
Down
Timer T3
General Purpose Timer Unit
T3OTL
C164CI/C164SI
To auxiliary
Timers
Interrupt
Request
(T3IR)
Derivatives
MCB04000c
V3.1, 2002-02
Table
10-6).
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