SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 51

• Manufacturer Part Number: SAF-C164SM
• Description: 16-Bit CMOS Microcontroller
• Manufacturer: Infineon Technologies

Verify cycles may be executed to ensure correct programming. Programming cycles and
verify cycles may alternate in order to check each word immediately. However, the total
programming time can be reduced by programming blocks of data continuously and then
verifying the blocks (this saves the
Note: The programming voltage
Figure 3-6
The programming cycles can be controlled in two different ways:
In CPU Host Mode (CHM) the CPU of the C164CM itself controls the programming
cycles via the OTP programming interface. The programming routine must be fetched
from outside the OTP memory (on-chip RAM or external memory).
In External Host Mode (EHM) the C164CM is put into emulation mode where the CPU
and the generic peripherals are disabled. The on-chip OTP memory can be accessed by
an external master via the C164CM’s bus interface. The bus interface signals change
their direction in this mode.
User’s Manual
must be removed for all other accesses, i.e. verify cycles and standard read
cycles. The setting time is 10 s in each case.
In EHM this must be controlled by the external host, in CHM the CPU may control
V
ADDR
DATA
RD
EA/Vpp
The special signals CE and RSEL must fulfill the same timing requirements as the address lines.
Note: All timings represent minimum values.
PP
via an output port line.
OTP Verify/Read Cycle
Vpp
<
V
DD
10 µs
50 ns
V
PP
OTP Word Address
V
PP
must be applied for all programming cycles and
settling time).
3-13
50 ns
15 ns
Memory Organization
C164CM/C164SM
Derivatives
MCT05094
V1.0, 2002-02