M-8870-02SM Clare Inc., M-8870-02SM Datasheet - Page 5

• Manufacturer Part Number: M-8870-02SM
• Description: DTMF Receiver
• Manufacturer: Clare Inc.

Rev. 3
Tone Decoding
stops the oscillator and the functioning of the filters.
On the M-8870-01 models, this pin is tied to ground
(logic low).
Inhibit mode is enabled by a logic high input to pin 5
(INH). It inhibits the detection of 1633 Hz. The output
code will remain the same as the previous detected
code (see Pin functions table on page 4). On the M-
8870-01 models, this pin is tied to ground (logic low).
Input Configuration
The input arrangement of the M-8870 provides a dif-
ferential input operational amplifier as well as a bias
source (V
is made for connection of a feedback resistor to the
op-amp output (GS) for gain adjustment.
Differential Input Configuration
FLOW
L = logic low, H = logic high, Z = high impedance
ANY
697
697
697
770
770
770
852
852
852
941
941
941
697
770
852
941
REF
) to bias the inputs at mid-rail. Provision
FHIGH
1209
1336
1477
1209
1336
1477
1209
1336
1477
1336
1209
1477
1633
1633
1633
1633
ANY
Key (ref.)
ANY
S
A
B
C
D
1
2
3
4
5
6
7
8
9
0
#
OE
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
www.clare.com
In a single-ended configuration, the input pins are
connected as shown in the Single - Ended Input
Configuration on page 3 with the op-amp connected
for unity gain and V
The Differential Input Configuration bellow permits
gain adjustment with the feedback resistor R
DTMF Clock Circuit
The internal clock circuit is completed with the addition
of a standard 3.579545 MHz television color burst crys-
tal. The crystal can be connected to a single M-8870 as
shown in the Single - Ended Input Configuration on
page 3, or to a series of M-8870s. As illustrated in the
Common Crystal Connection below, a single crystal
can be used to connect a series of M-8870s by cou-
pling the oscillator output of each M-8870 through a 30
pF capacitor to the oscillator input of the next M-8870.
Common Crystal Connection
Q4
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
Z
Q3
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
Z
REF
biasing the input at 1/2V
Q2
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
Z
M-8870
Q1
5
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Z
.
DD
.
5