ISD2100 Nuvoton Technology, ISD2100 Datasheet - Page 8

• Manufacturer Part Number: ISD2100
• Description: Digital ChipCorder
• Manufacturer: Nuvoton Technology

If the SCLK does not remain high, RDY bit of the status register will be set to zero and be reported via
the MISO pin so the host can take the necessary actions (i.e., terminate SPI transmission and re-
transmit the data when the RDY/BSYB pin returns to high).
For commands (i.e., DIG_READ, SPI_PCM_READ) that read data from ISD2100, MISO is used to
read the data; therefore, the host must monitor the status via the RDY/BSYB pin and take the
necessary actions.
The INT pin will go low to indicate (1) data overrun/overflow when sending data to the ISD2100; or (2)
invalid data from ISD2100. See Figure 6-3 for the timing diagram.
RDY/BSYB
SCLK
MISO
MOSI
SSB
Z
X
X
Figure 6-2 RDY/BSYB Timing for SPI Writing Transactions.
PD RDY INT FULL X
C7
0
C6
=1
1
C5
2
C4
3
C3
4
BSY
C2
VG
5
BUF
FUL
C1
6
C0
7
T
R
/
- 8 -
B
CMD
BSY
PD RDY INT FULL X
D7
0
ISD2100 DATASHEET
D6
=1
1
Publication Release Feb 9, 2010
D5
2
D4
3
D3
4
BSY
D2
VG
5
BUF
FUL
D1
6
Revision 0.51
CMD
BSY
D0
7
X