ISD5116X Winbond, ISD5116X Datasheet
ISD5116X
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ISD5116X Summary of contents
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Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability Features Summary Fully-Integrated Solution ! Single-chip voice record/playback solution ! Dual storage of digital and analog information Low Power Consumption ! +2.7 to +3. Supply Voltage ...
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Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability Features Summary Fully-Integrated Solution ! Single-chip voice record/playback solution ! Dual storage of digital and analog information Low Power Consumption ! +2.7 to +3. Supply Voltage ...
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Product Description The ISD5116 ChipCorder Product provides high quality, fully integrated, Record/Playback solutions for 8- to 16-minute messaging applications that are ideal for use in cellular phones, automotive GPS/navigation systems and products. The ISD5116 product is an enhancement of the ...
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ISD5116............................................................................................................................................1 1 Overview....................................................................................................................................5 1.1 Speech/Sound Quality .......................................................................................................5 1.2 Duration..............................................................................................................................5 1.3 Flash Storage.....................................................................................................................5 1.4 Microcontroller Interface 1.5 Programming......................................................................................................................5 2 Functional Description ...........................................................................................................6 2.1 Internal Registers...............................................................................................................7 2.2 Memory Organization.........................................................................................................7 2.3 Pinout Table .......................................................................................................................8 3 Operational Modes Description 2 3 Interface ...
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I C Serial Interface Technical Information 2 9.1 Characteristics of the I C Serial Interface 2 9 Protocol ......................................................................................................................49 10 Device Physical Dimensions 10.1. Plastic Thin Small Outline Package (TSOP) Type e 10.2. Plastic Small Outline ...
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... The ISD5116 series is also ideal for playback-only applications, where single or multiple messages may be played back when desired. Playback is controlled through the I configuration is created, duplicates can easily be generated via a third-party programmer. For more information on available application tools and programmers, please see the ISD web site at www.winbond-usa.com October 2000 1 Typical Filter Knee (kHz) 3 ...
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FUNCTIONAL DESCRIPTION The ISD5116 is a single chip solution for voice and analog storage that also includes the capability to store digital information in the memory array. The array may be divided between analog and digital storage, as the ...
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INTERNAL REGISTERS The ISD5116 has multiple internal registers that are used to store the address information and the configuration or set-up of the device. The two 16-bit configuration registers control the audio paths through the device, the sample frequency, ...
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PINOUT TABLE Pin Name Pin No. Pin No. 28-pin 28-pin TSOP SOIC RAC INT XCLK 5 26 SCL 8 1 SDA MIC MIC ...
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OPERATIONAL MODES DESCRIPTION 2 3 INTERFACE Important note: The rest of this data sheet will assume that the reader is familiar with the I serial interface. Additional information on I document. If you are not familiar with ...
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Slave responds with Lower Address byte of internal address register (A[4:0] will always return set to 0.) 10. Host sends a NO ACK to Slave, then executes I Note that the processor could have sent an I transfer of ...
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I C Control Registers The ISD5116 is controlled by loading commands to, or, reading from, the internal command, configuration and address registers. The Command byte sent is used to start and stop recording, write or read digital data ...
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Erase: digital page and block erase command ! Power up: global power up/down bit. (C7) ! Load address: load address register (is incorporated in play, record, read and write commands) ! Load CFG0: load configuration register 0 ! Load ...
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DATA BYTES 2 In the I C write mode, the device can accept data sent after the command byte register load option is selected, the next two bytes are loaded into the selected register. The format of ...
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Configuration Register 0 (CFG0) Configuration Register 0 (CFG0) D15 D14 D13 D12 D11 D10 D9 D15 D14 D13 D12 D11 D10 D9 AIG1 AIG0 AIPD AXG1 AXG0 AXPD INS0 AOS2 AOS1 AOS0 AOPD OPS1 OPS0 OPA1 OPA0 VLPD AIG1 AIG0 ...
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POWER-UP SEQUENCE This sequence prepares the ISD5116 for an operation to follow, waiting the Tpud time before sending the next command sequence Send I C POWER UP 2. Send one byte 10000000 {Slave Address, R ...
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The figure above shows the part of the ISD5116 block diagram that is used in Feed Through Mode. The rest of the chip will be powered down to conserve power. The bold lines highlight the audio paths. Note that the ...
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Power down the Volume Control Element—Bit VLPD controls the power up state of the Volume Control. This is bit D0 of CFG0 and it should be set to a ONE to power down this stage. 2. Power down the ...
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Select the SUM1 MUX input (only) to the S1 SUMMING amplifier—Bits S1M0 and S1M1 control the state of the SUM1 SUMMING amplifier. These are bits D7 and D8 respectively of CFG1 and they should be set to the state ...
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Power up the LOW PASS FILTER—Bit FLPD controls the power up state of the LOW PASS FILTER stage. This is bit D1 of CFG1 and it must be set to ZERO to power up the LOW PASS FILTER STAGE. ...
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In this example, we will assume the user wants an attenuation of –12 dB. For that setting, D11 should be set to ONE, D12 should be set to ONE, and D13 should be set to a ZERO. 8. Select ...
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ANALOG MODE 4.1 AUX IN AND ANA IN DESCRIPTION The AUX additional audio input to the ISD5116, such as from the microphone circuit in a mobile phone “car kit.” This input has a nominal 700 mV ...
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ISD5116 ANALOG STRUCTURE (LEFT HALF) DESCRIPTION INP INPUT SOURCE MUX AGC AMP AUX IN AMP (INS0) SUM1 MUX FILTO ANA IN AMP ARRAY Inso Source 0 AGC AMP 1 AUX IN AMP AIG1 AIG0 ...
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VOLUME CONTROL DESCRIPTION VOL ANA IN AMP MUX SUM2 SUM1 INP 2 (VLS1,VLS0) VLS1 VLS0 SOURCE AIG1 AIG0 AIP D AXG1 AXG0 ...
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ANA OUT DESCRIPTION *FTHRU *INP *VOL *FILTO *SUM1 *SUM2 3 (AOS2,AOS1,AOS0) *DIFFERENTIAL PATH AIPD AXG1 AXG0 AXPD 4.7 ANALOG INPUTS 4.7.1 Microphone Inputs The microphone inputs transfer the voice ...
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ANA IN (Analog Input) The ANA IN pin is the analog input from the telephone chip set. It can be switched (by the I the speaker output, the array input or to various other paths. This pin is designed to ...
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Setting 0TLP Input ( 0.694 3 dB 0.491 6 dB 0.347 9 dB 0.245 1. Gain from AUX IN to ANA OUT 2. Gain from AUX IN to ARRAY IN 3. 0TLP Input is the ...
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DIGITAL MODE 5.1 WRITING DATA The Digital Write function allows the user to select a portion of the array to be used as digital memory. The partition between analog and digital memory is left up to the user. A ...
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EXAMPLE COMMAND SEQUENCES An explanation and graphical representation of the Write, Read and Erase operations are found below. 1. Write digital data For the normal digital addressed mode the Registers are loaded as follows Host executes I ...
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Read digital data For a normal digital read, the Registers are loaded as follows Host executes I C START 2. Send Slave Address with R/W bit = “0” (Write) 3. Slave responds back with an ACK 4. ...
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Erase digital data 2 1. Host executes I C START 2. Send Slave Address with R/W bit = “0” (Write) 3. Slave responds back with an ACK 4. Wait for SCL to go HIGH 5. Host sends a byte ...
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PIN DESCRIPTIONS 6.1 DIGITAL I/O PINS SCL (Serial Clock Line) The Serial Clock Line is a bi-directional clock line open-drain line requiring a pull-up resistor to Vcc driven by the "master" chips in a ...
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Sample Rate 4.0 kHz t 2.5µs RAC t 0.5µs RACL0 t 2.0µs RACL1 INT (Interrupt) INT is an open drain output pin. The ISD5116 interrupt pin goes LOW and stays LOW when an Overflow (OVF) or End of Message (EOM) ...
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ANALOG I/O PINS MIC+, MIC- (Microphone Input +/-) The microphone input transfers the voice signal to the on-chip AGC preamplifier or directly to the ANA OUT MUX, depending on the selected path. The direct path to the ANA OUT ...
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AUX OUT (Auxiliary Output) The AUX OUT is an additional audio output pin to be used, for example, to drive the speaker circuit in a “car kit.” It drives a minimum load superimposed on approximately 1.2 VDC ...
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Setting 0TLP Input ( 1.110 9 dB 0.785 12 dB 0.555 15 dB 0.393 1. Gain from ANA IN to SP+/- 2. Gain from ANA IN to ARRAY IN 3. 0TLP Input is the reference ...
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POWER AND GROUND PINS (Voltage Inputs) CCA CCD To minimize noise, the analog and digital circuits in the ISD5116 device use separate power busses. These +3 V busses lead to separate pins. Tie the V both ...
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ELECTRICAL CHARACTERISTICS AND PARAMETERS 7.1 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings (Packaged Parts) Condition Junction temperature Storage temperature range Voltage Applied to any pin Voltage applied to any pin (Input current limited to +/-20 mA) Lead temperature (soldering – 10 ...
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PARAMETERS Symbol Parameters V Input Low Voltage IL V Input High Voltage IH V SCL, SDA Output Low Voltage OL V Input low voltage for 2V IL2V interface V Input high voltage for 2V IH2V interface V RAC, INT ...
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Symbol Parameters F Sampling Frequency S F Filter Knee CF 8.0 kHz (sample rate) 6.4 kHz (sample rate) 5.3 kHz (sample rate) 4.0 kHz (sample rate) T Record Duration REC 8.0 kHz (sample rate) 6.4 kHz (sample rate) 5.3 kHz ...
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T RAC Clock Period in RACE Erase Mode 8.0 kHz (sample rate) 6.4 kHz (sample rate) 5.3 kHz (sample rate) 4.0 kHz (sample rate) TRACML RAC Clock Low Time in Message Cueing Mode 8.0 kHz (sample rate) 6.4 kHz (sample ...
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AUX IN Symbol Parameters V AUX IN Input Voltage AUX IN V AUX IN (0TLP) Input Voltage AUX IN (0TLP) A Gain from AUX IN to ANA AUX IN (ANA OUT) OUT A AUX IN Gain Accuracy AUX IN ...
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ANA OUT Symbol Parameters SINAD SINAD, MIC IN to ANA OUT SINAD SINAD, AUX IN to ANA OUT ( dB) ICO Idle Channel Noise – NIC/ANA OUT Microphone ICN Idle Channel Noise – AUX IN AUX IN/ANA ...
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VOLUME CONTROL Symbol Parameters A Output Gain OUT Absolute Gain 1. Typical values 25°C and Vcc = 3.0V All min/max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 100 ...
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PARAMETER SCL clock frequency Hold time (repeated) START condition. After this period, the first clock pulse is generated LOW period of the SCL clock HIGH period of the SCL clock Set-up time for a repeated START condition Data set-up time ...
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TIMING DIAGRAMS 2 8 TIMING DIAGRAM START SDA SCL t f 8.2 PLAYBACK AND STOP CYCLE ...
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EXAMPLE OF POWER UP COMMAND (FIRST 12 BITS) October 2000 Page 46 ...
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I C SERIAL INTERFACE TECHNICAL INFORMATION 9.1 CHARACTERISTICS OF THE I 2 The I C interface is for bi-directional, two-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial ...
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System configuration A device generating a message is a ‘transmitter’; a device receiving a message is the ‘receiver’. The device that controls the message is the ‘master’ and the devices that are controlled by the master are the ‘slaves’. ...
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I C Protocol Since the I2C protocol allows multiple devices on the bus, each device must have an address. This address is known as a “Slave Address”. A Slave Address consists of 7 bits, followed by a single ...
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Master forces the end of the data transfer from the Slave. The following example details the transfer explained in Section 5.4-2 Master Reads from the Slave after setting data address in Slave (Write data address, READ Data) ...
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DEVICE PHYSICAL DIMENSIONS 10.1. PLASTIC THIN SMALL OUTLINE PACKAGE (TSOP) TYPE E DIMENSIONS Plastic Thin Small Outline Package (T SOP) T ype E Dimensions INCHES Min ...
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PLASTIC SMALL OUTLINE INTEGRATED CIRCUIT (SOIC) DIMENSIONS Plastic Small Outline Integrated Circuit (SOIC) Dimensions INCHES Min A 0.701 ...
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PLASTIC DUAL INLINE PACKAGE (PDIP) DIMENSIONS Plastic Dual Inline Package (PDIP) (P) Dimensions October 2000 Page 53 ...
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DIE BONDING PHYSICAL LAYOUT ISD5116 DEVICE PIN/PAD LOCATIONS WITH RESPECT TO DIE CENTER IN MICRON (µM) PIN V V Digital Ground SSD Digital Ground SSD SS AD0 Address 0 SDA Serial Data Address AD1 Address 1 ...
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ISD 5116 SERIES BONDING PHYSICAL LAYOUT ISD5116 Series Die Dimensions X: 4125 um Y: 8030 um (3) Die Thickness 292 12.7 um Pad Opening (min microns 3.5 x 3.5 mils MIC+ 1. ...
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... Industrial (–40°C to +85°C) Package Type 28-Lead 8x13.4mm Plastic Thin Small Outline Package (TSOP) Type 28-Lead 0.300-Inch Plastic Small Outline Package (SOIC Die P = 28-Lead 0.600-Inch Plastic Dual Inline Package (PDIP) Part Number ISD5116E ISD5116ED ISD5116EI ISD5116S ISD5116SD ISD5116SI ISD5116X ISD5116P www.winbond-usa.com. Page 56 ...