EL5285C Elantec Semiconductor, EL5285C Datasheet
EL5285C
Related parts for EL5285C
EL5285C Summary of contents
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... The rail-to-rail output swing enables direct connection of the comparator to both CMOS and TTL logic circuits. The latch input of the EL5285C can be used to hold the comparator output value by applying a low logic level to the pin. The EL5285C features two separate comparators The EL5285C is available in the 14-pin SO package and is specified for operation over the full -40° ...
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... EL5285C - Preliminary Dual and Window 4ns High-Speed Comparators Absolute Maximum Ratings Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. Analog Supply Voltage ( ...
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... Temperature (°C) Output Low Voltage vs Temperature 0.285 0.275 0.265 0.255 0.245 0.235 -50 -30 - Temperature (°C) EL5285C - Preliminary Dual and Window 4ns High-Speed Comparators Output High Voltage vs Temperature 4.832 4.83 4.828 4.826 4.824 4.822 4.82 4.818 5 6 -50 -30 Input Bias Current vs Temperature ...
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... EL5285C - Preliminary Dual and Window 4ns High-Speed Comparators Typical Performance Curves Propagation Delay vs Overdrive V =5V IN STEP 7.8 7 7.4 7 6.8 6.6 6.4 0.2 0.6 1 1.4 1.8 V (V) OD Propagation Delay vs Supply Voltage 6.8 6.6 6 5.6 4 4.2 4.4 4.6 4.8 5 5.2 5.4 ±V (V) S Propagation Delay vs Overdrive V =1V IN STEP 6.1 6 5.9 5 5.7 5.6 5 5.4 5.3 5.2 50 100 150 200 250 300 ...
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... C (pF) LOAD Output with 50MHz Input V =1V IN P-P Output (5ns/div, 2V/div) Input (5ns/div, 0.5V/div) EL5285C - Preliminary Dual and Window 4ns High-Speed Comparators Package Power Dissipation vs Ambient Temp. JEDEC JESD51-3 Low Effective Thermal Conductivity Test Board 0.9 0.8 833mW 0.7 0.6 0.5 0.4 0.3 0.2 0 100 0 25 ...
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... EL5285C - Preliminary Dual and Window 4ns High-Speed Comparators Pin Descriptions Pin Number Pin Name 1 VS+ Positive supply current 2 INA+ Positive input, channel A 3 INA- Negative input, channel Not connected 5 INB+ Negative input, channel B 6 INB- Positive input, channel B 7 VS- ...
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... Minimum Latch Disable Pulse Width - The minimum time that the latch signal must remain high in order to acquire and hold an input signal pw change EL5285C - Preliminary Dual and Window 4ns High-Speed Comparators Compare Latch ...
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... With high overdrive voltages, the propagation delay does not change much with the input slew rate. Latch Pin Dynamics The EL5285C contains a “transparent” latch for each channel. The latch pin is designed to be driven with either a TTL or CMOS output. When the latch is con- ...
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... V SD REF --------------------------------------- - EL5285C - Preliminary Dual and Window 4ns High-Speed Comparators and The above two methods will generate hysteresis few hundred millivolts. Beyond that, the impedance low enough to affect the bias string and adjustment may be required. ...
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... DC average voltage based on the output. The crystal's path provides resonant positive feedback and stable oscillation occurs. Although the EL5285C will give the correct logic output when an input is out- side the common mode range, additional delays may occur when operated. Therefore, the DC bias ...
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... EL5285C - Preliminary Dual and Window 4ns High-Speed Comparators General Disclaimer Specifications contained in this data sheet are in effect as of the publication date shown. Elantec, Inc. reserves the right to make changes in the cir- cuitry or specifications contained herein at any time without notice. Elantec, Inc. assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement ...