HC4094 System Logic Semiconductor, HC4094 Datasheet - Page 4

• Manufacturer Part Number: HC4094
• Description: 8-Bit Serial-Input Shift Register With Latched 3-State Outputs(High-Performance Silicon-Gate CMOS)
• Manufacturer: System Logic Semiconductor

SL74HC4094
AC ELECTRICAL CHARACTERISTICS
TIMING REQUIREMENTS
t
t
t
t
Symbol
Symbol
PLH
PLH
PLZ
PZL
C
f
C
t
C
max
t
r
OUT
t
, t
, t
t
, t
, t
, t
PD
su
IN
w
h
PHZ
PZH
PHL
PHL
f
Maximum Clock Frequency (50% Duty Cycle)
(Figures 1 and 5)
Maximum Propagation Delay, Clock to SQ
(Figures 1 and 5)
Maximum Propagation Delay, Clock to Q
(Figures 2 and 5)
Maximum Propagation Delay ,Output Enable to
Q
Maximu m Propagation Delay ,Output Enable to
Q
Maximum Input Capacitance
Maximum Three-State Output Capacitance
(Output in High-Impedance State), Q
Power Dissipation Capacitance (Per Package)
Used to determine the no-load dynamic power
consumption: P
Minimum Setup Time, Serial Data
Input A to Clock (Figure 4)
Minimum Hold Time, Clock to Data
Input A (Figure 4)
Minimum Pulse Width, Strobe (Figure
1)
Maximum Input Rise and Fall Times
(Figure 1)
A
A
-Q
-Q
H
H
(Figures 3 and 6)
(Figures 3 and 6)
Parameter
D
=C
PD
Parameter
V
CC
(C
2
L
f+I
=50pF,Input t
CC
V
CC
A
-Q
(C
r
H
A
=t
L
-Q
H
V
=50pF,Input t
f
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
=6.0 ns)
V
CC
H
25 C to
V
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
-55 C
V
-
-
1000
CC
500
400
9.0
r
50
10
80
16
14
=t
3
3
3
f
Typical @25 C,V
=6.0 ns)
25 C to
Guaranteed Limit
-55 C
150
195
125
175
30
35
30
26
40
33
25
21
35
30
10
15
6
Guaranteed Limit
1000
300
85 C
100
500
400
65
13
11
20
17
3
3
3
85 C
190
245
155
220
25
28
38
33
50
42
31
26
44
37
10
15
5
SLS
CC
=5.0 V
125 C
1000
120
500
400
System Logic
Semiconductor
75
15
13
24
20
125 C
3
3
3
225
295
190
265
20
23
45
38
60
50
38
32
53
45
10
15
4
Unit
MHz
Unit
ns
ns
ns
ns
pF
pF
pF
ns
ns
ns
ns