93LC46-IP Microchip Technology, 93LC46-IP Datasheet
93LC46-IP
Related parts for 93LC46-IP
93LC46-IP Summary of contents
Page 1
... Low power CMOS technology - 1 mA active current typical - 5 A standby current (typical) at 3.0V • ORG pin selectable memory configuration - 128 16-bit organization (93LC46) - 256 128 x 16-bit organization(93LC56) - 512 256 x 16-bit organization(93LC66) • Self-timed ERASE and WRITE cycles (including auto-erase) • ...
Page 2
... WC Program cycle time Endurance 93LC46 — 93LC56/66 — Note 1: This parameter is tested at Tamb = 25˚C and F 2: Typical program cycle time per word. 3: This parameter is periodically sampled and not 100% tested. 4: This application is not tested but guaranteed by characterization. For endurance estimates in a specific applica- tion, please consult the Total Endurance Model which can be obtained on our BBS or website ...
Page 3
... When ORG is connected to Vcc or floated, the (x16) memory organization is selected. ORG can only be floated for clock speeds of 1 MHz or less for the (X16) memory organization. For clock speeds greater than 1 MHz, ORG must be tied to Vcc 93LC46/56/66 after the posi the (x8) memory organiza- SS DS11168L-page 3 ...
Page 4
... Instruction SB Opcode ERASE 1 11 ERAL 1 00 EWDS 1 00 EWEN 1 00 READ 1 10 WRITE 1 01 WRAL 1 00 TABLE 2-2 INSTRUCTION SET FOR 93LC46: ORG = ORGANIZATION) Instruction SB Opcode ERASE 1 11 ERAL 1 00 EWDS 1 00 EWEN 1 00 READ 1 10 WRITE 1 01 WRAL 1 00 TABLE 2-3 ...
Page 5
... After power-up, the device is automatically in the EWDS mode. Therefore, an EWEN instruction must be performed before any ERASE or WRITE instruction can be executed. of opcodes CKH CKL T DIH T PD STATUS VALID 93LC46/56/66 T CSH DS11168L-page 5 ...
Page 6
... ERASE The ERASE instruction forces all data bits of the spec- ified address to the logical “1” state brought low following the loading of the last address bit. This falling edge of the CS pin initiates the self-timed programming cycle. The DO pin indicates the READY/BUSY status of the ...
Page 7
... ERASE/WRITE Disable and Enable (EWEN, EWDS) The 93LC46/56/66 powers up in the ERASE/WRITE Disable (EWDS) state. All programming modes must be preceded by an ERASE/WRITE Enable (EWEN) instruction. Once the EWEN instruction is executed, programming remains enabled until an EWDS instruc- tion is executed removed from the device. To ...
Page 8
... WRITE The WRITE instruction is followed by 8 bits ( bits) of data which are written into the specified address. After the last data bit is put on the DI pin, CS must be brought low before the next rising edge of the CLK clock. This falling edge of CS initiates the self- timed auto-erase and programming cycle ...
Page 9
... NOTES: 1997 Microchip Technology Inc. 93LC46/56/66 DS11168L-page 9 ...
Page 10
... NOTES: DS11168L-page 10 1997 Microchip Technology Inc. ...
Page 11
... PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.. 93LC46/56/66 — /P Package: Temperature Range: Device: Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom- mended workarounds ...
Page 12
... Information contained in this publication regarding device applications and the like is intended for suggestion only and may be superseded by updates. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip ...