M27W401-80XN6TR STMicroelectronics, M27W401-80XN6TR Datasheet - Page 5

• Manufacturer Part Number: M27W401-80XN6TR
• Description: 4 Mbit 512Kb x 8 Low Voltage UV EPROM and OTP EPROM
• Manufacturer: STMicroelectronics

Table 7. Read Mode DC Characteristics
(T
Note: 1. V
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, the product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection.
The two line control function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
Symbol
A
V
will not occur.
I
I
V
V
I
I
CC1
CC2
I
V
IH
= –40 to 85 C; V
I
CC
LO
PP
OL
OH
LI
2. Maximum DC voltage on Output is V
IL
(2)
CC
must be applied simultaneously with or before V
Input Leakage Current
Output Leakage Current
Supply Current
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage TTL
CC
Parameter
= 2.7V to 3.6V; V
CC
+0.5V.
PP
(1)
= V
PP
CC
I
and removed simultaneously or after V
OUT
)
0V
E = V
Test Condition
E > V
0V
I
OH
= 0mA, f = 5MHz,
I
V
V
OL
V
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, I
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
output capacitive and inductive loading of the de-
vice. The associated transient voltage peaks can
be suppressed by complying with the two line out-
put control and by properly selected decoupling
capacitors. It is recommended that a 0.1 F ceram-
ic capacitor be used on every device between V
and V
tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
tion, a 4.7 F bulk electrolytic capacitor should be
used between V
es. The bulk capacitor should be located near the
power supply connection point.The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
CC
CC
PP
E = V
V
= –400 A
IL
V
= 2.1mA
CC
OUT
, G = V
IN
= V
3.6V
3.6V
– 0.2V,
SS
IH
CC
V
V
. This should be a high frequency capaci-
CC
CC
IL
,
CC
and V
0.7 V
PP
–0.6
Min
2.4
.
SS
CC
for every eight devic-
CC
V
0.2 V
, has three seg-
CC
Max
0.4
15
15
10
10
10
1
+ 0.5
CC
M27W402
Unit
mA
mA
V
V
V
V
A
A
A
A
5/15
CC