M27V101-90N6TR STMicroelectronics, M27V101-90N6TR Datasheet - Page 4

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M27V101-90N6TR

Manufacturer Part Number
M27V101-90N6TR
Description
1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM
Manufacturer
STMicroelectronics
Datasheet
M27V102
Table 5. AC Measurement Conditions
Figure 3. AC Testing Input Output Waveform
Table 6. Capacitance
Note: 1. Sampled only, not 100% tested.
For the most efficient use of thesetwo control lines,
E should be decoded and used as the primary
device selecting function, while G should be made
a common connection to all devices in the array
and connected to the READ line from the system
control bus. This ensures that all deselectedmem-
ory devices are in their low power standby mode
and that the output pins are only active when data
is required from a particular memory device.
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, I
ments that are of interest to the system designer :
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
4/15
Input Rise and Fall Times
Input Pulse Voltages
Input and Output Timing Ref. Voltages
High Speed
Standard
Symbol
2.4V
0.4V
C
C
3V
0V
OUT
IN
Input Capacitance
Output Capacitance
(1)
Parameter
(T
A
= 25 C, f = 1 MHz )
CC
, has three seg-
1.5V
2.0V
0.8V
AI01822
Test Condition
High Speed
V
V
OUT
0 to 3V
IN
1.5V
10ns
= 0V
Figure 4. AC Testing Load Circuit
transientcurrent peaks is dependenton the capaci-
tive and inductive loading of the device at the
output.
The associated transient voltage peaks can be
suppressed by complying with the two line output
control and by properly selected decoupling ca-
pacitors. It is recommended that a 0.1 F ceramic
capacitor be used on every device between V
and V
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7 F bulk electrolytic capacitor should be used
between Vcc and V
bulk capacitor should be located near the power
supply connection point. The purpose of the bulk
capacitor is to overcome the voltage drop caused
by the inductive effects of PCB traces.
= 0V
C L = 30pF for High Speed
C L = 100pF for Standard
C L includes JIG capacitance
DEVICE
SS
UNDER
TEST
. This should be a high frequency capacitor
Min
SS
1.3V
for every eight devices. The
1N914
3.3k
0.4V to 2.4V
0.8V and 2V
C L
Max
Standard
12
6
20ns
OUT
AI01823B
Unit
pF
pF
CC

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