EL7556BC Elantec Semiconductor, EL7556BC Datasheet - Page 8

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EL7556BC

Manufacturer Part Number
EL7556BC
Description
Integrated Adjustable 6 Amp Synchronous Switcher
Manufacturer
Elantec Semiconductor
Datasheet

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EL7556BC
Integrated Adjustable 6 Amp Synchronous Switcher
Pin Descriptions
I = Input, O = Output, S = Supply
Pin Number
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
VCC2DET
Pin Name
CSLOPE
PWRGD
OUTEN
CREF
COSC
VSSP
VSSP
VSSP
VSSP
VSSP
TEST
VSSP
VSSP
VDD
VSS
C2V
FB1
VIN
VIN
VHI
FB2
OT
LX
LX
LX
LX
CP
Pin Type
O
O
O
O
O
O
O
S
S
S
S
S
S
S
S
S
S
S
I
I
I
I
I
I
I
I
I
I
Voltage feedback pin for the buck regulator. Active when VCC2DET is logic low. Normally connected to exter-
nal resistor divider between VOUT and GND. A 2µA pull-up current forces VOUT to VSS in the event that
FB1is floating and VCC2DET is inadvertently connected to GND.
Bandgap reference bypass capacitor. Typically 0.1µF to VSS.
Slope compensation capacitor. Ramp width corresponds to LX duty cycle. C
1:1.5.
Oscillator timing capacitor. F
Power Supply for PWM control circuitry. Normally the same potential as VIN.
Power supply for the buck regulator. Connected to the drain of the high-side NMOS FET.
Ground return for the buck regulator. Connected to the source of the low-side synchronous NMOS FET.
Same as pin 6.
Same as pin 7.
Same as pin 7.
Same as pin 7.
Same as pin 7.
VCC2DET interface logic input. When driven to logic 1 V
FB1 to determine V
The switching regulator output is enabled when logic 1. The reference voltage output operates whenever the
power supply is qualified (VDD>VPOR) regardless of the state of this pin.
Over temperature indicator. Normally high. Pulls low when die temperature exceeds 135°C, returns to the high
state when die temperature has cooled to 100°C.
Power good window comparator output. Logic 1 when regulator output is within ±10% of programmed voltage.
Test pin. Must be connected to VSSP in normal operation.
Same as pin 7.
Same as pin 7.
Inductor drive pin. High current switching output whose average voltage equals the regulator output voltage.
Same as pin 20.
Same as pin 20.
Same as pin 20.
Gate drive to high-side driver. Bootstrapped from LX with a 0.1µF capacitor.
Ground return for the control circuitry.
Connected to voltage doubler output. Supplies gate drive to the low-side driver.
Drives the negative side of charge pump capacitor at one-half the oscillator frequency F
Voltage feedback pin. Active when VCC2DET is logic 1. Internally preset to V
OUT
: V
OUT
OSC
= 1.0V*(1+R3/R4).
8
(Hz) can be approximated by: F
Function
OUT
= 3.500V. When driven to logic 0 the PWM uses
OSC
(Hz) = 0.0001/C
SLOPE
OUT
to C
= 3.5V.
OSC
OSC
OSC
. C
.
ratio is normally
OSC
in Farads.

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