LM6482 National Semiconductor, LM6482 Datasheet - Page 12

• Manufacturer Part Number: LM6482
• Description: CMOS Dual Rail-To-Rail Input and Output Operational Amplifier
• Manufacturer: National Semiconductor

www.national.com
Typical Performance Characteristics
specified (Continued)
Stability vs
Capacitive Load
Application Information
1.0 Amplifier Topology
The
wide-compliance range current mirrors and the body effect to
extend input common mode range to each supply rail.
Complementary paralleled differential input stages, like the
type used in other CMOS and bipolar rail-to-rail input ampli-
fiers, were not used because of their inherent accuracy prob-
lems due to CMRR, cross-over distortion, and open-loop
gain variation.
The LMC6482’s input stage design is complemented by an
output stage capable of rail-to-rail output swing even when
driving a large load. Rail-to-rail output swing is obtained by
taking the output directly from the internal integrator instead
of an output buffer stage.
2.0 Input Common-Mode Voltage Range
Unlike Bi-FET amplifier designs, the LMC6482 does not ex-
hibit phase inversion when an input voltage exceeds the
negative supply voltage. Figure 1 shows an input voltage ex-
ceeding both supplies with no resulting phase inversion on
the output.
The absolute maximum input voltage is 300 mV beyond ei-
ther supply rail at room temperature. Voltages greatly ex-
ceeding this absolute maximum rating, as in Figure 2 , can
cause excessive current to flow in or out of the input pins
possibly affecting reliability.
FIGURE 1. An Input Voltage Signal Exceeds the
LMC6482
LMC6482 Power Supply Voltages with
No Output Phase Inversion
incorporates
DS011713-90
specially
Stability vs
Capacitive Load
DS011713-10
designed
V
12
S
= +15V, Single Supply, T
Applications that exceed this rating must externally limit the
maximum input current to
as shown in Figure 3 .
3.0 Rail-To-Rail Output
The approximated output resistance of the LMC6482 is
180
sourcing and 80
output resistance, maximum output voltage swing can be es-
timated as a function of load.
4.0 Capacitive Load Tolerance
The LMC6482 can typically directly drive a 100 pF load with
V
lower is the most sensitive configuration. Direct capacitive
loading reduces the phase margin of op-amps. The combi-
S
= 15V at unity gain without oscillating. The unity gain fol-
DS011713-91
Exceeds the 3V Supply in Figure 3 Causing
sourcing and 130
FIGURE 3. R
Voltages Exceeding the Supply Voltages
FIGURE 2. A
No Phase Inversion Due to R
sinking at Vs = 5V. Using the calculated
I
Input Current Protection for
±
A
7.5V Input Signal Greatly
= 25˚C unless otherwise
±
sinking at Vs = 3V and 110
5 mA with an input resistor (R
DS011713-11
I
DS011713-39
I
)