T89C5115 ATMEL Corporation, T89C5115 Datasheet - Page 43

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T89C5115

Manufacturer Part Number
T89C5115
Description
Low Pin Count 8-bit MCU with A/D Converter and 16-Kbytes of Flash Memory
Manufacturer
ATMEL Corporation
Datasheet

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Automatic Address
Recognition
4128A–8051–04/02
valid stop bits cannot clear the FE bit. When the FE feature is enabled, RI rises on the
stop bit instead of the last data bit (See Figure 20 and Figure 21).
Figure 20. UART Timing in Mode 1
Figure 21. UART Timing in Modes 2 and 3
The automatic address recognition feature is enabled when the multiprocessor commu-
nication feature is enabled (SM2 bit in SCON register is set).
Implemented in the hardware, automatic address recognition enhances the multiproces-
sor communication feature by allowing the serial port to examine the address of each
incoming command frame. Only when the serial port recognizes its own address will the
receiver set the RI bit in the SCON register to generate an interrupt. This ensures that
the CPU is not interrupted by command frames addressed to other devices.
If necessary, you can enable the automatic address recognition feature in mode 1. In
this configuration, the stop bit takes the place of the ninth data bit. Bit RI is set only when
the received command frame address matches the device’s address and is terminated
by a valid stop bit.
To support automatic address recognition, a device is identified by a given address and
a broadcast address.
Note:
SMOD0=0
SMOD0=1
SMOD0=1
SMOD0=X
SMOD0=1
The multiprocessor communication and automatic address recognition features cannot
be enabled in mode 0 (i.e. setting SM2 bit in SCON register in mode 0 has no effect).
RXD
RXD
FE
RI
RI
FE
RI
Start
Start
bit
bit
D0
D0
D1
D1
D2
D2
D3
D3
Data byte
Data byte
D4
D4
D5
D5
D6
D6
D7
D7
T89C5115
Ninth
Stop
D8
bit
bit
Stop
bit
43

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