COP8CBR9 National Semiconductor, COP8CBR9 Datasheet - Page 11
![no-image](/images/manufacturer_photos/0/4/469/national_semiconductor_sml.jpg)
COP8CBR9
Manufacturer Part Number
COP8CBR9
Description
8-Bit CMOS Flash Microcontroller with 32k Memory/ Virtual EEPROM/ 10-Bit A/D and Brownout
Manufacturer
National Semiconductor
Datasheet
1.COP8CBR9.pdf
(84 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
COP8CBR91MT8
Manufacturer:
NS/国半
Quantity:
20 000
Company:
Part Number:
COP8CBR9HVA8
Manufacturer:
Texas Instruments
Quantity:
10 000
Company:
Part Number:
COP8CBR9HVA8/NOPB
Manufacturer:
Texas Instruments
Quantity:
10 000
Company:
Part Number:
COP8CBR9LVA8
Manufacturer:
Texas Instruments
Quantity:
10 000
6.0 Architectural Overview
examples. In many cases, the instruction set can simulta-
neously execute as many as three functions with the same
single-byte instruction.
JID: (Jump Indirect); Single byte instruction decodes exter-
nal events and jumps to corresponding service routines
(analogous to “DO CASE” statements in higher level lan-
guages).
LAID: (Load Accumulator-Indirect); Single byte look up table
instruction provides efficient data path from the program
memory to the CPU. This instruction can be used for table
lookup and to read the entire program memory for checksum
calculations.
RETSK: (Return Skip); Single byte instruction allows return
from subroutine and skips next instruction. Decision to
branch can be made in the subroutine itself, saving code.
AUTOINC/DEC: (Auto-Increment/Auto-Decrement); These
instructions use the two memory pointers B and X to effi-
ciently process a block of data (simplifying “FOR NEXT” or
other loop structures in higher level languages).
6.6.4 Bit-Level Control
Bit-level control over many of the microcontroller’s I/O ports
provides a flexible means to ease layout concerns and save
board space. All members of the COP8 family provide the
(Continued)
11
ability to set, reset and test any individual bit in the data
memory address space, including memory-mapped I/O ports
and associated registers.
6.6.5 Register Set
Three memory-mapped pointers handle register indirect ad-
dressing and software stack pointer functions. The memory
data pointers allow the option of post-incrementing or post-
decrementing with the data movement instructions (LOAD/
EXCHANGE). And 15 memory-mapped registers allow de-
signers to optimize the precise implementation of certain
specific instructions.
6.7 PACKAGING/PIN EFFICIENCY
Real estate and board configuration considerations demand
maximum space and pin efficiency, particularly given today’s
high integration and small product form factors. Microcon-
troller users try to avoid using large packages to get the I/O
needed. Large packages take valuable board space and
increase device cost, two trade-offs that microcontroller de-
signs can ill afford.
The COP8 family offers a wide range of packages and does
not waste pins.
www.national.com