MC912DG128A Motorola, MC912DG128A Datasheet - Page 336
MC912DG128A
Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC912DG128A.pdf
(404 pages)
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Enabling the BDM
lockout
Disabling the BDM
lockout
BDM Registers
Development Support
MC68HC912DT128A Rev 2.0
336
NOTE:
Enabling the BDM lockout feature is only possible in special modes
(SMODN=0) and is accomplished by the following steps.
Disabling the BDM lockout is only possible in special modes
(SMODN=0) except in special single chip. Follow the same steps as for
enabling the BDM lockout, but erase the SHADOW word.
At the next reset, the high byte of SHADOW word is loaded into the
EEMCR register. NOBDML bit in EEMCR will be set and BDM becomes
operational.
When the BDM lockout is enabled it is not possible to run code from the
reset vector in special single chip mode.
Seven BDM registers are mapped into the standard 64-Kbyte address
space when BDM is active. Mapping is shown in
1. Remove the SHADOW word protection by clearing SHPROT bit in
2. Clear NOSHW bit in EEMCR register to make the SHADOW word
3. Program bit 7 of the high byte of the SHADOW word like a regular
4. Protect the SHADOW word by setting SHPROT bit in EEPROT
EEPROT register.
visible at $0FC0-$0FC1.
EEPROM location at address $0FC0 (write $7F into address
$0FC0). Do not program other bits of the high byte of the
SHADOW word (location $0FC0); otherwise some regular
EEPROM array locations will not be visible. At the next reset, the
high byte of the SHADOW word is loaded into the EEMCR
register. NOBDML bit in EEMCR will be cleared and BDM will not
be operational.
register.
Development Support
Address
$FF00
$FF01
Table 58 BDM registers
BDM Instruction Register
BDM Status Register
Register
Table
58.
MOTOROLA
10-dev
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