SP6203 Sipex, SP6203 Datasheet
SP6203
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SP6203 Summary of contents
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... Adjustable Output Available The SP6203/6205 are ultra low noise CMOS LDOs with very low dropout and ground current. The noise performance is achieved by means of an external bypass capacitor without sacrificing turn-on and turn-off speed critical to portable applications. Extremely stable and easy to use, these devices offer excellent PSRR and Line/Load regulation ...
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... Turn-Off Time (T ), OFF Output Discharge Resistance Enable Input Logic Low Voltage Enable Input Logic High Voltage Date: 05/25/04 SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators Input Voltage (V Enable Input Voltage (V +1V IN Junction Temperature (T Thermal Resistance, SOT-23-5 (θ Thermal Resistance, 8 Pin DFN (θ ...
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... 1.25V bandgap reference current limit & thermal shutdown GND Low Noise Fixed Regulator - 5 Pin Date: 05/25/04 SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators ELECTRICAL CHARACTERISTIC NOTES = (T D J(max) is the junction-to-ambient thermal resistance. θ JA ° is 191 C/W and for t = 1ms. ...
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... SIPEX 4 BYP Fixed Voltage Regulator Date: 05/25/04 SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators FUNCTION Power Supply Input Ground Terminal Enable/Shutdown (Logic high = enable, logic low = shutdown) Reference bypass input for ultra-quiet operation. Connecting a 10nF cap on this pin reduces output noise ...
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... EN Turn off Time 6Ω (500mA) LOAD V (AC) OUT I OUT Load Regulation 100µA ~ 500mA O Date: 05/25/04 SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators TYPICAL PERFORMANCE CHARACTERISTICS V OUT V EN Turn on Time 50Ω (60mA) LOAD V OUT V EN Turn off Time 30K (0 ...
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... BYP Start Up Waveform, Slow V , 500mA Output Load OUT BYP Start Up Waveform, Slow =1000µ OUT Date: 05/25/04 SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators OUT OUT = 500mA BYP O Start Up Waveform, Slow OUT BYP ...
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... TYPICAL PERFORMANCE CHARACTERISTICS: Continued Fast V , 500mA Output Load OUT BYP Fast =1000µF, I =500mA IN OUT O Date: 05/25/04 SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators OUT BYP Fast V = 1000µF Output Load IN © Copyright 2004 Sipex Corporation 7 ...
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... GND if a battery is used as the power source. Any good quality electrolytic, ceramic or tantalum capacitor may be used at the input. Date: 05/25/04 SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators Output Capacitor An output capacitor is required between V and GND to prevent oscillation. A 2.2µF output capacitor is recommended. ...
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... θJ D J(max Date: 05/25/04 SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators THEORY OF OPERATION: Continued T is the maximum junction temperature of J(max) the die and is 125°C. T ture. θ is the junction-to-ambient thermal re sistance for the regulator and is layout depen- WU dent. The SOT-23-5 package has a θ ...
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... Date: 05/25/04 SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators THEORY OF OPERATION: Continued Layout Considerations The primary path of heat conduction out of the package is via the package leads. Therefore, ...
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... Dimensions in (mm) JEDEC MO-178 (AA) Variation MIN 0.90 b 0. Ø 0º Ø1 5º Date: 05/25/04 SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators E Seating Plane NOM MAX - 1.45 - 0.15 1.15 1. 0.50 - 0.22 2.90 BSC 2.80 BSC 1.60 BSC WITH PLATING 0.95 BSC 1.90 BSC 0.45 0.60 0.60 REF 0.25 BSC 4º ...
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... Top View D D/2 Pin 1 identifier to be located within this shaded area. Terminal #1 Index Area (D/2 * E/2) Side View A A1 Date: 05/25/04 SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators Bottom View 2x3 8 Pin DFN JEDEC mo-229C (VCED-2) Variation Symbol ...
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... SP6203ER-2.7 .................. 620327YWW ................. -40˚C to +125˚C ......................... 8 Pin DFN SP6203ER-2.7/TR ............ 620327YWW ................. -40˚C to +125˚C ......................... 8 Pin DFN SP6203ER-2.8 .................. 620328YWW ................. -40˚C to +125˚C ......................... 8 Pin DFN SP6203ER-2.8/TR ............ 620328YWW ................. -40˚C to +125˚C ......................... 8 Pin DFN SP6203ER-2.85 ................ 620385YWW ................. -40˚C to +125˚C ......................... 8 Pin DFN SP6203ER-2.85/TR .......... 620385YWW ................. -40˚C to +125˚C ......................... 8 Pin DFN SP6203ER-3.0 .................. 620330YWW ................. -40˚ ...
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... Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Date: 05/25/04 SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators ORDERING INFORMATION Temperature Range © ...