HTRC11001 Philips Semiconductors, HTRC11001 Datasheet - Page 11

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HTRC11001

Manufacturer Part Number
HTRC11001
Description
HITAG reader chip
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
2001 Nov 23
PD_MODE
FREEZE1,
FREEZE0
ACQAMP
THRESET
FSEL1, FSEL0
DISSMART-
COMP
DISLP1
HITAG reader chip
BIT NAME
VALUE
00
01
10
11
00
01
10
11
0
1
0
1
0
1
0
1
0
1
select Power-down mode
Idle mode
Power-down mode
facility to achieve fast settling times (MSB and LSB)
normal operation
main low-pass is frozen; main high-pass is pre-charged to level on pin QGND
main low-pass is frozen; time constant of main high-pass is reduced by a
factor of 16 for bit FILTERH = 0 and by a factor of 8 for bit FILTERH = 1
main high-pass time constant is reduced by a factor of 16 for bit FILTERH = 0
and by a factor of 8 for bit FILTERH = 1; second high-pass is pre-charged
store signal amplitude (see also bit AMPCOMP in Table 5)
set status bit AMPCOMP when the actual data signal amplitude is higher than
the stored reference
store actual amplitude of the data signal as reference for later amplitude
comparison
reset threshold generation of digitizer
no reset
reset
clock frequency selection (MSB and LSB)
4 MHz
8 MHz
12 MHz
16 MHz
disable smart comparator
smart comparator: on
smart comparator: off
disable low-pass 1
low-pass: on
low-pass: off
11
DESCRIPTION
HTRC11001T
Product specification
INITIAL
VALUE
00
00
0
0
0
0
0

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