K4D263238A Samsung, K4D263238A Datasheet - Page 10
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K4D263238A
Manufacturer Part Number
K4D263238A
Description
1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL
Manufacturer
Samsung
Datasheet
1.K4D263238A.pdf
(17 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
K4D263238A-6C45
Manufacturer:
TOS
Quantity:
5 510
Company:
Part Number:
K4D263238A-GC33
Manufacturer:
SAM
Quantity:
28
Company:
Part Number:
K4D263238A-GC40
Manufacturer:
SAMSUNG
Quantity:
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Company:
Part Number:
K4D263238A-GC40
Manufacturer:
WM
Quantity:
146
Note :
K4D263238A-GC
ABSOLUTE MAXIMUM RATINGS
POWER & DC OPERATING CONDITIONS(SSTL_2 In/Out)
Recommended operating conditions(Voltage referenced to V
Note :
Voltage on any pin relative to Vss
Voltage on V
Voltage on V
Storage temperature
Power dissipation
Short circuit current
Device Supply voltage
Output Supply voltage
Reference voltage
Termination voltage
Input logic high voltage
Input logic low voltage
Output logic high voltage
Output logic low voltage
Input leakage current
Output leakage current
1. Under all conditions V
2. V
3. V
4. V
5. V
6. For any pin under test input of 0V < V
7. For K4D263238A-GC33/36/40/45/50, V
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
peak noise on the V
Parameter
REF
tt
IH
IL
of the transmitting device must track V
(max.)= V
(mim.)= -1.5V for a pulse width and it can not be greater than 1/3 of the cycle rate.
DD
DD
is expected to equal 0.50*V
Parameter
supply relative to Vss
supply relative to Vss
DDQ
+1.5V for a pulse width and it can not be greater than 1/3 of the cycle rate.
REF
DDQ
may not exceed + 2% of the DC value.
must be less than or equal to V
Symbol
V
V
V
V
V
IH(DC)
V
IL(DC)
V
Vtt
I
DDQ
REF
I
OL
DD
OH
OL
IL
DDQ
of the transmitting device and to track variations in the DC level of the same. Peak to
IN
DD/
< V
REF
0.49*V
V
V
V
DD
Vtt+0.76
REF
DDQ=
REF
2.375
2.375
-0.30
of the receiving device.
V
Min
is acceptable. For all other pins that are not under test V
Symbol
-5
-5
IN
+0.15
-
-0.04
V
T
V
2.5V
, V
I
P
DDQ
DDQ
STG
OS
DD
D
SS
OUT
=0V, T
+
- 10 -
5%
DD
A
.
=0 to 65°C)
V
2.50
2.50
Typ
REF
-
-
-
-
-
-
-
V
0.51*V
V
V
DDQ
Vtt-0.76
REF
REF
2.625
2.625
Max
-55 ~ +150
5
5
-0.5 ~ 3.6
-1.0 ~ 3.6
-0.5 ~ 3.6
-
+0.04
+0.30
-0.15
Value
DDQ
2.3
50
128M DDR SDRAM
Unit
uA
uA
V
V
V
V
V
V
V
V
Rev. 2.0 (Jan. 2003)
IN
=0V.
I
I
OL
OH
=+15.2mA
Unit
=-15.2mA
mA
Note
°C
W
V
V
V
1,7
1,7
2
3
4
5
6
6